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aspeed,ast2400-cf-fsi-master.yaml
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linux-6.19.14/Documentation/devicetree/bindings/fsi/aspeed,ast2400-cf-fsi-master.yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/fsi/aspeed,ast2400-cf-fsi-master.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ASpeed ColdFire offloaded GPIO-based FSI master 8 9maintainers: 10 - Eddie James <eajames@linux.ibm.com> 11 12allOf: 13 - $ref: /schemas/fsi/fsi-controller.yaml# 14 15properties: 16 compatible: 17 enum: 18 - aspeed,ast2400-cf-fsi-master 19 - aspeed,ast2500-cf-fsi-master 20 21 clock-gpios: 22 maxItems: 1 23 description: GPIO for FSI clock 24 25 data-gpios: 26 maxItems: 1 27 description: GPIO for FSI data signal 28 29 enable-gpios: 30 maxItems: 1 31 description: GPIO for enable signal 32 33 trans-gpios: 34 maxItems: 1 35 description: GPIO for voltage translator enable 36 37 mux-gpios: 38 maxItems: 1 39 description: 40 GPIO for pin multiplexing with other functions (eg, external FSI masters) 41 42 memory-region: 43 maxItems: 1 44 description: 45 Reference to the reserved memory for the ColdFire. Must be 2M aligned on 46 AST2400 and 1M aligned on AST2500. 47 48 aspeed,cvic: 49 description: Reference to the CVIC node. 50 $ref: /schemas/types.yaml#/definitions/phandle 51 52 aspeed,sram: 53 description: Reference to the SRAM node. 54 $ref: /schemas/types.yaml#/definitions/phandle 55 56required: 57 - compatible 58 - clock-gpios 59 - data-gpios 60 - enable-gpios 61 - trans-gpios 62 - mux-gpios 63 - memory-region 64 - aspeed,cvic 65 - aspeed,sram 66 67unevaluatedProperties: false 68 69examples: 70 - | 71 fsi-master { 72 compatible = "aspeed,ast2500-cf-fsi-master"; 73 clock-gpios = <&gpio 0>; 74 data-gpios = <&gpio 1>; 75 enable-gpios = <&gpio 2>; 76 trans-gpios = <&gpio 3>; 77 mux-gpios = <&gpio 4>; 78 memory-region = <&coldfire_memory>; 79 aspeed,cvic = <&cvic>; 80 aspeed,sram = <&sram>; 81 };
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