fsl-qdma.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: NXP Layerscape SoC qDMA Controller
  8
  9maintainers:
 10  - Frank Li <Frank.Li@nxp.com>
 11
 12properties:
 13  compatible:
 14    oneOf:
 15      - const: fsl,ls1021a-qdma
 16      - items:
 17          - enum:
 18              - fsl,ls1028a-qdma
 19              - fsl,ls1043a-qdma
 20              - fsl,ls1046a-qdma
 21          - const: fsl,ls1021a-qdma
 22
 23  reg:
 24    items:
 25      - description: Controller regs
 26      - description: Status regs
 27      - description: Block regs
 28
 29  interrupts:
 30    minItems: 2
 31    maxItems: 5
 32
 33  interrupt-names:
 34    minItems: 2
 35    items:
 36      - const: qdma-error
 37      - const: qdma-queue0
 38      - const: qdma-queue1
 39      - const: qdma-queue2
 40      - const: qdma-queue3
 41
 42  dma-channels:
 43    minimum: 1
 44    maximum: 64
 45
 46  fsl,dma-queues:
 47    $ref: /schemas/types.yaml#/definitions/uint32
 48    description: Should contain number of queues supported.
 49    minimum: 1
 50    maximum: 4
 51
 52  block-number:
 53    $ref: /schemas/types.yaml#/definitions/uint32
 54    description: the virtual block number
 55
 56  block-offset:
 57    $ref: /schemas/types.yaml#/definitions/uint32
 58    description: the offset of different virtual block
 59
 60  status-sizes:
 61    $ref: /schemas/types.yaml#/definitions/uint32
 62    description: status queue size of per virtual block
 63
 64  queue-sizes:
 65    $ref: /schemas/types.yaml#/definitions/uint32-array
 66    description:
 67      command queue size of per virtual block, the size number
 68      based on queues
 69
 70  big-endian:
 71    $ref: /schemas/types.yaml#/definitions/flag
 72    description:
 73      If present registers and hardware scatter/gather descriptors
 74      of the qDMA are implemented in big endian mode, otherwise in little
 75      mode.
 76
 77required:
 78  - compatible
 79  - reg
 80  - interrupts
 81  - interrupt-names
 82  - fsl,dma-queues
 83  - block-number
 84  - block-offset
 85  - status-sizes
 86  - queue-sizes
 87
 88allOf:
 89  - $ref: dma-controller.yaml#
 90  - if:
 91      properties:
 92        compatible:
 93          contains:
 94            enum:
 95              - fsl,ls1028a-qdma
 96              - fsl,ls1043a-qdma
 97              - fsl,ls1046a-qdma
 98    then:
 99      properties:
100        interrupts:
101          minItems: 5
102        interrupt-names:
103          minItems: 5
104    else:
105      properties:
106        interrupts:
107          maxItems: 3
108        interrupt-names:
109          maxItems: 3
110
111unevaluatedProperties: false
112
113examples:
114  - |
115    #include <dt-bindings/interrupt-controller/arm-gic.h>
116
117    dma-controller@8390000 {
118        compatible = "fsl,ls1021a-qdma";
119        reg = <0x8388000 0x1000>, /* Controller regs */
120              <0x8389000 0x1000>, /* Status regs */
121              <0x838a000 0x2000>; /* Block regs */
122        interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
123                     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
124                     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
125        interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1";
126        #dma-cells = <1>;
127        dma-channels = <8>;
128        block-number = <2>;
129        block-offset = <0x1000>;
130        status-sizes = <64>;
131        queue-sizes = <64 64>;
132        big-endian;
133        fsl,dma-queues = <2>;
134    };
135