apm,xgene-storm-dma.yaml

 1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/dma/apm,xgene-storm-dma.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: APM X-Gene Storm SoC DMA
 8
 9maintainers:
10  - Khuong Dinh <khuong@os.amperecomputing.com>
11
12properties:
13  compatible:
14    const: apm,xgene-storm-dma
15
16  reg:
17    items:
18      - description: DMA control and status registers
19      - description: Descriptor ring control and status registers
20      - description: Descriptor ring command registers
21      - description: SoC efuse registers
22
23  interrupts:
24    items:
25      - description: DMA error reporting interrupt
26      - description: DMA channel 0 completion interrupt
27      - description: DMA channel 1 completion interrupt
28      - description: DMA channel 2 completion interrupt
29      - description: DMA channel 3 completion interrupt
30
31  clocks:
32    maxItems: 1
33
34  dma-coherent: true
35
36required:
37  - compatible
38  - reg
39  - interrupts
40  - clocks
41
42additionalProperties: false
43
44examples:
45  - |
46    dma@1f270000 {
47        compatible = "apm,xgene-storm-dma";
48        reg = <0x1f270000 0x10000>,
49              <0x1f200000 0x10000>,
50              <0x1b000000 0x400000>,
51              <0x1054a000 0x100>;
52        interrupts = <0x0 0x82 0x4>,
53                    <0x0 0xb8 0x4>,
54                    <0x0 0xb9 0x4>,
55                    <0x0 0xba 0x4>,
56                    <0x0 0xbb 0x4>;
57        dma-coherent;
58        clocks = <&dmaclk 0>;
59    };