st,stm32mp25-lvds.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: STMicroelectronics STM32 LVDS Display Interface Transmitter
  8
  9maintainers:
 10  - Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
 11  - Yannick Fertre <yannick.fertre@foss.st.com>
 12
 13description: |
 14  The STMicroelectronics STM32 LVDS Display Interface Transmitter handles the
 15  LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC)
 16  onto the LVDS PHY.
 17
 18  It is composed of three sub blocks:
 19    - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input
 20      pixels onto the data lanes of the PHY
 21    - LVDS PHY: parallelize the data and drives the LVDS data lanes
 22    - LVDS wrapper: handles top-level settings
 23
 24  The LVDS controller driver supports the following high-level features:
 25    - FDP-Link-I and OpenLDI (v0.95) protocols
 26    - Single-Link or Dual-Link operation
 27    - Single-Display or Double-Display (with the same content duplicated on both)
 28    - Flexible Bit-Mapping, including JEIDA and VESA
 29    - RGB888 or RGB666 output
 30    - Synchronous design, with one input pixel per clock cycle
 31
 32properties:
 33  compatible:
 34    oneOf:
 35      - items:
 36          - enum:
 37              - st,stm32mp255-lvds
 38          - const: st,stm32mp25-lvds
 39      - const: st,stm32mp25-lvds
 40
 41  "#clock-cells":
 42    const: 0
 43    description:
 44      Provides the internal LVDS PHY clock to the framework.
 45
 46  reg:
 47    maxItems: 1
 48
 49  clocks:
 50    items:
 51      - description: APB peripheral clock
 52      - description: Reference clock for the internal PLL
 53
 54  clock-names:
 55    items:
 56      - const: pclk
 57      - const: ref
 58
 59  resets:
 60    maxItems: 1
 61
 62  access-controllers:
 63    maxItems: 1
 64
 65  power-domains:
 66    maxItems: 1
 67
 68  ports:
 69    $ref: /schemas/graph.yaml#/properties/ports
 70
 71    properties:
 72      port@0:
 73        $ref: /schemas/graph.yaml#/properties/port
 74        description:
 75          LVDS input port node, connected to the LTDC RGB output port.
 76
 77      port@1:
 78        $ref: /schemas/graph.yaml#/properties/port
 79        description:
 80          LVDS output port node, connected to a panel or bridge input port.
 81
 82    required:
 83      - port@0
 84      - port@1
 85
 86required:
 87  - compatible
 88  - "#clock-cells"
 89  - reg
 90  - clocks
 91  - clock-names
 92  - resets
 93  - ports
 94
 95additionalProperties: false
 96
 97examples:
 98  - |
 99    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
100    #include <dt-bindings/reset/st,stm32mp25-rcc.h>
101
102    lvds: lvds@48060000 {
103        compatible = "st,stm32mp25-lvds";
104        reg = <0x48060000 0x2000>;
105        #clock-cells = <0>;
106        clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>;
107        clock-names = "pclk", "ref";
108        resets = <&rcc LVDS_R>;
109
110        ports {
111            #address-cells = <1>;
112            #size-cells = <0>;
113
114            port@0 {
115                reg = <0>;
116                lvds_in: endpoint {
117                   remote-endpoint = <&ltdc_ep1_out>;
118                };
119            };
120
121            port@1 {
122                reg = <1>;
123                lvds_out0: endpoint {
124                   remote-endpoint = <&lvds_panel_in>;
125                };
126            };
127        };
128    };
129
130...