samsung,exynos-hdmi.yaml

  1# SPDX-License-Identifier: GPL-2.0-only
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung Exynos SoC HDMI
  8
  9maintainers:
 10  - Inki Dae <inki.dae@samsung.com>
 11  - Seung-Woo Kim <sw0312.kim@samsung.com>
 12  - Kyungmin Park <kyungmin.park@samsung.com>
 13  - Krzysztof Kozlowski <krzk@kernel.org>
 14
 15properties:
 16  compatible:
 17    enum:
 18      - samsung,exynos4210-hdmi
 19      - samsung,exynos4212-hdmi
 20      - samsung,exynos5420-hdmi
 21      - samsung,exynos5433-hdmi
 22
 23  clocks:
 24    minItems: 5
 25    maxItems: 10
 26
 27  clock-names:
 28    minItems: 5
 29    maxItems: 10
 30
 31  ddc:
 32    $ref: /schemas/types.yaml#/definitions/phandle
 33    description:
 34      Phandle to the HDMI DDC node.
 35
 36  hdmi-en-supply:
 37    description:
 38      Provides voltage source for DCC lines available on HDMI connector. When
 39      there is no power provided for DDC epprom, some TV-sets do not pulls up
 40      HPD (hot plug detect) line, what causes HDMI block to stay turned off.
 41      When provided, the regulator allows TV-set correctly signal HPD event.
 42
 43  hpd-gpios:
 44    maxItems: 1
 45    description:
 46      A GPIO line connected to HPD
 47
 48  interrupts:
 49    maxItems: 1
 50
 51  phy:
 52    $ref: /schemas/types.yaml#/definitions/phandle
 53    description: Phandle to the HDMI PHY node.
 54
 55  ports:
 56    $ref: /schemas/graph.yaml#/properties/ports
 57    description:
 58      Contains a port which is connected to mic node.
 59
 60  power-domains:
 61    maxItems: 1
 62
 63  reg:
 64    maxItems: 1
 65
 66  samsung,syscon-phandle:
 67    $ref: /schemas/types.yaml#/definitions/phandle
 68    description:
 69      Phandle to the PMU system controller node.
 70
 71  samsung,sysreg-phandle:
 72    $ref: /schemas/types.yaml#/definitions/phandle
 73    description:
 74      Phandle to DISP system controller interface.
 75
 76  '#sound-dai-cells':
 77    const: 0
 78
 79  vdd-supply:
 80    description:
 81      VDD 1.0V HDMI TX.
 82
 83  vdd_osc-supply:
 84    description:
 85      VDD 1.8V HDMI OSC.
 86
 87  vdd_pll-supply:
 88    description:
 89      VDD 1.0V HDMI PLL.
 90
 91required:
 92  - compatible
 93  - clocks
 94  - clock-names
 95  - ddc
 96  - hpd-gpios
 97  - interrupts
 98  - phy
 99  - reg
100  - samsung,syscon-phandle
101  - '#sound-dai-cells'
102  - vdd-supply
103  - vdd_osc-supply
104  - vdd_pll-supply
105
106allOf:
107  - if:
108      properties:
109        compatible:
110          contains:
111            const: samsung,exynos5433-hdmi
112    then:
113      properties:
114        clocks:
115          items:
116            - description: Gate of HDMI IP APB bus.
117            - description: Gate of HDMI-PHY IP APB bus.
118            - description: Gate of HDMI TMDS clock.
119            - description: Gate of HDMI pixel clock.
120            - description: TMDS clock generated by HDMI-PHY.
121            - description: MUX used to switch between oscclk and tmds_clko,
122                respectively if HDMI-PHY is off and operational.
123            - description: Pixel clock generated by HDMI-PHY.
124            - description: MUX used to switch between oscclk and pixel_clko,
125                respectively if HDMI-PHY is off and operational.
126            - description: Oscillator clock, used as parent of following *_user
127                clocks in case HDMI-PHY is not operational.
128            - description: Gate of HDMI SPDIF clock.
129        clock-names:
130          items:
131            - const: hdmi_pclk
132            - const: hdmi_i_pclk
133            - const: i_tmds_clk
134            - const: i_pixel_clk
135            - const: tmds_clko
136            - const: tmds_clko_user
137            - const: pixel_clko
138            - const: pixel_clko_user
139            - const: oscclk
140            - const: i_spdif_clk
141      required:
142        - samsung,sysreg-phandle
143    else:
144      properties:
145        clocks:
146          items:
147            - description: Gate of HDMI IP bus clock.
148            - description: Gate of HDMI special clock.
149            - description: Pixel special clock, one of the two possible inputs
150                of HDMI clock mux.
151            - description: HDMI PHY clock output, one of two possible inputs of
152                HDMI clock mux.
153            - description: It is required by the driver to switch between the 2
154                parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
155                after configuration, parent is set to sclk_hdmiphy else
156                sclk_pixel.
157        clock-names:
158          items:
159            - const: hdmi
160            - const: sclk_hdmi
161            - const: sclk_pixel
162            - const: sclk_hdmiphy
163            - const: mout_hdmi
164
165additionalProperties: false
166
167examples:
168  - |
169    #include <dt-bindings/clock/exynos5433.h>
170    #include <dt-bindings/gpio/gpio.h>
171    #include <dt-bindings/interrupt-controller/arm-gic.h>
172
173    hdmi@13970000 {
174        compatible = "samsung,exynos5433-hdmi";
175        reg = <0x13970000 0x70000>;
176        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
177        clocks = <&cmu_disp CLK_PCLK_HDMI>,
178                 <&cmu_disp CLK_PCLK_HDMIPHY>,
179                 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>,
180                 <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>,
181                 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>,
182                 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>,
183                 <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>,
184                 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>,
185                 <&xxti>,
186                 <&cmu_disp CLK_SCLK_HDMI_SPDIF>;
187        clock-names = "hdmi_pclk",
188                      "hdmi_i_pclk",
189                      "i_tmds_clk",
190                      "i_pixel_clk",
191                      "tmds_clko",
192                      "tmds_clko_user",
193                      "pixel_clko",
194                      "pixel_clko_user",
195                      "oscclk",
196                      "i_spdif_clk";
197        phy = <&hdmiphy>;
198        ddc = <&hsi2c_11>;
199        samsung,syscon-phandle = <&pmu_system_controller>;
200        samsung,sysreg-phandle = <&syscon_disp>;
201        #sound-dai-cells = <0>;
202
203        hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
204        vdd-supply = <&ldo6_reg>;
205        vdd_osc-supply = <&ldo7_reg>;
206        vdd_pll-supply = <&ldo6_reg>;
207
208        ports {
209            #address-cells = <1>;
210            #size-cells = <0>;
211
212            port@0 {
213                reg = <0>;
214                hdmi_to_tv: endpoint {
215                    remote-endpoint = <&tv_to_hdmi>;
216                };
217            };
218
219            port@1 {
220                reg = <1>;
221                hdmi_to_mhl: endpoint {
222                    remote-endpoint = <&mhl_to_hdmi>;
223                };
224            };
225        };
226    };