rockchip-vop.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Rockchip SoC display controller (VOP)
  8
  9description:
 10  VOP (Video Output Processor) is the display controller for the Rockchip
 11  series of SoCs which transfers the image data from a video memory
 12  buffer to an external LCD interface.
 13
 14maintainers:
 15  - Sandy Huang <hjc@rock-chips.com>
 16  - Heiko Stuebner <heiko@sntech.de>
 17
 18properties:
 19  compatible:
 20    enum:
 21      - rockchip,px30-vop-big
 22      - rockchip,px30-vop-lit
 23      - rockchip,rk3036-vop
 24      - rockchip,rk3066-vop
 25      - rockchip,rk3126-vop
 26      - rockchip,rk3188-vop
 27      - rockchip,rk3228-vop
 28      - rockchip,rk3288-vop
 29      - rockchip,rk3328-vop
 30      - rockchip,rk3366-vop
 31      - rockchip,rk3368-vop
 32      - rockchip,rk3399-vop-big
 33      - rockchip,rk3399-vop-lit
 34      - rockchip,rv1126-vop
 35
 36  reg:
 37    minItems: 1
 38    items:
 39      - description:
 40          Must contain one entry corresponding to the base address and length
 41          of the register space.
 42      - description:
 43          Can optionally contain a second entry corresponding to
 44          the CRTC gamma LUT address.
 45
 46  interrupts:
 47    maxItems: 1
 48    description:
 49      The VOP interrupt is shared by several interrupt sources, such as
 50      frame start (VSYNC), line flag and other status interrupts.
 51
 52  clocks:
 53    items:
 54      - description: Clock for ddr buffer transfer.
 55      - description: Pixel clock.
 56      - description: Clock for the ahb bus to R/W the phy regs.
 57
 58  clock-names:
 59    items:
 60      - const: aclk_vop
 61      - const: dclk_vop
 62      - const: hclk_vop
 63
 64  resets:
 65    maxItems: 3
 66
 67  reset-names:
 68    items:
 69      - const: axi
 70      - const: ahb
 71      - const: dclk
 72
 73  port:
 74    $ref: /schemas/graph.yaml#/properties/port
 75
 76  iommus:
 77    maxItems: 1
 78
 79  power-domains:
 80    maxItems: 1
 81
 82required:
 83  - compatible
 84  - reg
 85  - interrupts
 86  - clocks
 87  - clock-names
 88  - resets
 89  - reset-names
 90  - port
 91
 92additionalProperties: false
 93
 94examples:
 95  - |
 96    #include <dt-bindings/clock/rk3288-cru.h>
 97    #include <dt-bindings/interrupt-controller/arm-gic.h>
 98    #include <dt-bindings/power/rk3288-power.h>
 99    vopb: vopb@ff930000 {
100      compatible = "rockchip,rk3288-vop";
101      reg = <0xff930000 0x19c>,
102            <0xff931000 0x1000>;
103      interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
104      clocks = <&cru ACLK_VOP0>,
105               <&cru DCLK_VOP0>,
106               <&cru HCLK_VOP0>;
107      clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
108      power-domains = <&power RK3288_PD_VIO>;
109      resets = <&cru SRST_LCDC1_AXI>,
110               <&cru SRST_LCDC1_AHB>,
111               <&cru SRST_LCDC1_DCLK>;
112      reset-names = "axi", "ahb", "dclk";
113      iommus = <&vopb_mmu>;
114      vopb_out: port {
115        #address-cells = <1>;
116        #size-cells = <0>;
117        vopb_out_edp: endpoint@0 {
118          reg = <0>;
119          remote-endpoint = <&edp_in_vopb>;
120        };
121        vopb_out_hdmi: endpoint@1 {
122          reg = <1>;
123          remote-endpoint = <&hdmi_in_vopb>;
124        };
125      };
126    };