rockchip,rk3066-hdmi.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Rockchip rk3066 HDMI controller
  8
  9maintainers:
 10  - Sandy Huang <hjc@rock-chips.com>
 11  - Heiko Stuebner <heiko@sntech.de>
 12
 13allOf:
 14  - $ref: /schemas/sound/dai-common.yaml#
 15
 16properties:
 17  compatible:
 18    const: rockchip,rk3066-hdmi
 19
 20  reg:
 21    maxItems: 1
 22
 23  interrupts:
 24    maxItems: 1
 25
 26  clocks:
 27    maxItems: 1
 28
 29  clock-names:
 30    const: hclk
 31
 32  power-domains:
 33    maxItems: 1
 34
 35  rockchip,grf:
 36    $ref: /schemas/types.yaml#/definitions/phandle
 37    description:
 38      This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
 39
 40  "#sound-dai-cells":
 41    const: 0
 42
 43  ports:
 44    $ref: /schemas/graph.yaml#/properties/ports
 45
 46    properties:
 47      port@0:
 48        $ref: /schemas/graph.yaml#/properties/port
 49        description:
 50          Port node with two endpoints, numbered 0 and 1,
 51          connected respectively to vop0 and vop1.
 52
 53      port@1:
 54        $ref: /schemas/graph.yaml#/properties/port
 55        description:
 56          Port node with one endpoint connected to a hdmi-connector node.
 57
 58    required:
 59      - port@0
 60      - port@1
 61
 62required:
 63  - compatible
 64  - reg
 65  - interrupts
 66  - clocks
 67  - clock-names
 68  - pinctrl-0
 69  - pinctrl-names
 70  - power-domains
 71  - rockchip,grf
 72  - ports
 73
 74additionalProperties: false
 75
 76examples:
 77  - |
 78    #include <dt-bindings/clock/rk3066a-cru.h>
 79    #include <dt-bindings/interrupt-controller/arm-gic.h>
 80    #include <dt-bindings/pinctrl/rockchip.h>
 81    #include <dt-bindings/power/rk3066-power.h>
 82    hdmi: hdmi@10116000 {
 83      compatible = "rockchip,rk3066-hdmi";
 84      reg = <0x10116000 0x2000>;
 85      interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 86      clocks = <&cru HCLK_HDMI>;
 87      clock-names = "hclk";
 88      pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
 89      pinctrl-names = "default";
 90      power-domains = <&power RK3066_PD_VIO>;
 91      rockchip,grf = <&grf>;
 92      #sound-dai-cells = <0>;
 93
 94      ports {
 95        #address-cells = <1>;
 96        #size-cells = <0>;
 97        hdmi_in: port@0 {
 98          reg = <0>;
 99          #address-cells = <1>;
100          #size-cells = <0>;
101          hdmi_in_vop0: endpoint@0 {
102            reg = <0>;
103            remote-endpoint = <&vop0_out_hdmi>;
104          };
105          hdmi_in_vop1: endpoint@1 {
106            reg = <1>;
107            remote-endpoint = <&vop1_out_hdmi>;
108          };
109        };
110        hdmi_out: port@1 {
111          reg = <1>;
112          hdmi_out_con: endpoint {
113            remote-endpoint = <&hdmi_con_in>;
114          };
115        };
116      };
117    };
118
119    pinctrl {
120      hdmi {
121        hdmi_hpd: hdmi-hpd {
122          rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
123        };
124        hdmii2c_xfer: hdmii2c-xfer {
125          rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
126                          <0 RK_PA2 1 &pcfg_pull_none>;
127        };
128      };
129    };