panel-timing.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: panel timing
  8
  9maintainers:
 10  - Thierry Reding <thierry.reding@gmail.com>
 11  - Sam Ravnborg <sam@ravnborg.org>
 12
 13description: |
 14  There are different ways of describing the timing data of a panel. The
 15  devicetree representation corresponds to the one commonly found in datasheets
 16  for panels.
 17
 18  The parameters are defined as seen in the following illustration.
 19
 20  +-------+----------+-------------------------------------+----------+
 21  |       |          |        ^                            |          |
 22  |       |          |        |vsync_len                   |          |
 23  |       |          |        v                            |          |
 24  +-------+----------+-------------------------------------+----------+
 25  |       |          |        ^                            |          |
 26  |       |          |        |vback_porch                 |          |
 27  |       |          |        v                            |          |
 28  +-------+----------#######################################----------+
 29  |       |          #        ^                            #          |
 30  |       |          #        |                            #          |
 31  | hsync |  hback   #        |                            #  hfront  |
 32  |  len  |   porch  #        |       hactive              #  porch   |
 33  |<----->|<-------->#<-------+--------------------------->#<-------->|
 34  |       |          #        |                            #          |
 35  |       |          #        |vactive                     #          |
 36  |       |          #        |                            #          |
 37  |       |          #        v                            #          |
 38  +-------+----------#######################################----------+
 39  |       |          |        ^                            |          |
 40  |       |          |        |vfront_porch                |          |
 41  |       |          |        v                            |          |
 42  +-------+----------+-------------------------------------+----------+
 43
 44  The following is the panel timings shown with time on the x-axis.
 45  This matches the timing diagrams often found in data sheets.
 46
 47              Active                 Front           Sync           Back
 48              Region                 Porch                          Porch
 49  <-----------------------><----------------><-------------><-------------->
 50    //////////////////////|
 51   ////////////////////// |
 52  //////////////////////  |..................               ................
 53                                             _______________
 54
 55  Timing can be specified either as a typical value or as a tuple
 56  of min, typ, max values.
 57
 58properties:
 59
 60  clock-frequency:
 61    description: Panel clock in Hz
 62
 63  hactive:
 64    $ref: /schemas/types.yaml#/definitions/uint32
 65    description: Horizontal panel resolution in pixels
 66
 67  vactive:
 68    $ref: /schemas/types.yaml#/definitions/uint32
 69    description: Vertical panel resolution in pixels
 70
 71  hfront-porch:
 72    description: Horizontal front porch panel timing
 73    $ref: /schemas/types.yaml#/definitions/uint32-array
 74    oneOf:
 75      - maxItems: 1
 76        items:
 77          description: typical number of pixels
 78      - minItems: 3
 79        maxItems: 3
 80        items:
 81          description: min, typ, max number of pixels
 82
 83  hback-porch:
 84    description: Horizontal back porch timing
 85    $ref: /schemas/types.yaml#/definitions/uint32-array
 86    oneOf:
 87      - maxItems: 1
 88        items:
 89          description: typical number of pixels
 90      - minItems: 3
 91        maxItems: 3
 92        items:
 93          description: min, typ, max number of pixels
 94
 95  hsync-len:
 96    description: Horizontal sync length panel timing
 97    $ref: /schemas/types.yaml#/definitions/uint32-array
 98    oneOf:
 99      - maxItems: 1
100        items:
101          description: typical number of pixels
102      - minItems: 3
103        maxItems: 3
104        items:
105          description: min, typ, max number of pixels
106
107  vfront-porch:
108    description: Vertical front porch panel timing
109    $ref: /schemas/types.yaml#/definitions/uint32-array
110    oneOf:
111      - maxItems: 1
112        items:
113          description: typical number of lines
114      - minItems: 3
115        maxItems: 3
116        items:
117          description: min, typ, max number of lines
118
119  vback-porch:
120    description: Vertical back porch panel timing
121    $ref: /schemas/types.yaml#/definitions/uint32-array
122    oneOf:
123      - maxItems: 1
124        items:
125          description: typical number of lines
126      - minItems: 3
127        maxItems: 3
128        items:
129          description: min, typ, max number of lines
130
131  vsync-len:
132    description: Vertical sync length panel timing
133    $ref: /schemas/types.yaml#/definitions/uint32-array
134    oneOf:
135      - maxItems: 1
136        items:
137          description: typical number of lines
138      - minItems: 3
139        maxItems: 3
140        items:
141          description: min, typ, max number of lines
142
143  hsync-active:
144    description: |
145      Horizontal sync pulse.
146      0 selects active low, 1 selects active high.
147      If omitted then it is not used by the hardware
148    $ref: /schemas/types.yaml#/definitions/uint32
149    enum: [0, 1]
150
151  vsync-active:
152    description: |
153      Vertical sync pulse.
154      0 selects active low, 1 selects active high.
155      If omitted then it is not used by the hardware
156    $ref: /schemas/types.yaml#/definitions/uint32
157    enum: [0, 1]
158
159  de-active:
160    description: |
161      Data enable.
162      0 selects active low, 1 selects active high.
163      If omitted then it is not used by the hardware
164    $ref: /schemas/types.yaml#/definitions/uint32
165    enum: [0, 1]
166
167  pixelclk-active:
168    description: |
169      Data driving on rising or falling edge.
170      Use 0 to drive pixel data on falling edge and
171      sample data on rising edge.
172      Use 1 to drive pixel data on rising edge and
173      sample data on falling edge
174    $ref: /schemas/types.yaml#/definitions/uint32
175    enum: [0, 1]
176
177  syncclk-active:
178    description: |
179      Drive sync on rising or sample sync on falling edge.
180      If not specified then the setup is as specified by pixelclk-active.
181      Use 0 to drive sync on falling edge and
182      sample sync on rising edge of pixel clock.
183      Use 1 to drive sync on rising edge and
184      sample sync on falling edge of pixel clock
185    $ref: /schemas/types.yaml#/definitions/uint32
186    enum: [0, 1]
187
188  interlaced:
189    type: boolean
190    description: Enable interlaced mode
191
192  doublescan:
193    type: boolean
194    description: Enable double scan mode
195
196  doubleclk:
197    type: boolean
198    description: Enable double clock mode
199
200required:
201  - clock-frequency
202  - hactive
203  - vactive
204  - hfront-porch
205  - hback-porch
206  - hsync-len
207  - vfront-porch
208  - vback-porch
209  - vsync-len
210
211additionalProperties: false
212
213...