qcom,sc7180-dpu.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Qualcomm Display DPU on SC7180
  8
  9maintainers:
 10  - Krishna Manikandan <quic_mkrishn@quicinc.com>
 11
 12$ref: /schemas/display/msm/dpu-common.yaml#
 13
 14properties:
 15  compatible:
 16    enum:
 17      - qcom,sc7180-dpu
 18      - qcom,sm6125-dpu
 19      - qcom,sm6350-dpu
 20      - qcom,sm6375-dpu
 21
 22  reg:
 23    items:
 24      - description: Address offset and size for mdp register set
 25      - description: Address offset and size for vbif register set
 26
 27  reg-names:
 28    items:
 29      - const: mdp
 30      - const: vbif
 31
 32  clocks:
 33    minItems: 6
 34    items:
 35      - description: Display hf axi clock
 36      - description: Display ahb clock
 37      - description: Display rotator clock
 38      - description: Display lut clock
 39      - description: Display core clock
 40      - description: Display vsync clock
 41      - description: Display core throttle clock
 42
 43  clock-names:
 44    minItems: 6
 45    items:
 46      - const: bus
 47      - const: iface
 48      - const: rot
 49      - const: lut
 50      - const: core
 51      - const: vsync
 52      - const: throttle
 53
 54required:
 55  - compatible
 56  - reg
 57  - reg-names
 58  - clocks
 59  - clock-names
 60
 61unevaluatedProperties: false
 62
 63allOf:
 64  - if:
 65      properties:
 66        compatible:
 67          enum:
 68            - qcom,sm6375-dpu
 69            - qcom,sm6125-dpu
 70
 71    then:
 72      properties:
 73        clocks:
 74          minItems: 7
 75
 76        clock-names:
 77          minItems: 7
 78
 79examples:
 80  - |
 81    #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
 82    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
 83    #include <dt-bindings/power/qcom-rpmpd.h>
 84
 85    display-controller@ae01000 {
 86        compatible = "qcom,sc7180-dpu";
 87        reg = <0x0ae01000 0x8f000>,
 88              <0x0aeb0000 0x2008>;
 89
 90        reg-names = "mdp", "vbif";
 91
 92        clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
 93                 <&dispcc DISP_CC_MDSS_AHB_CLK>,
 94                 <&dispcc DISP_CC_MDSS_ROT_CLK>,
 95                 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
 96                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
 97                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
 98        clock-names = "bus", "iface", "rot", "lut", "core",
 99                      "vsync";
100
101        interrupt-parent = <&mdss>;
102        interrupts = <0>;
103        power-domains = <&rpmhpd SC7180_CX>;
104        operating-points-v2 = <&mdp_opp_table>;
105
106        ports {
107            #address-cells = <1>;
108            #size-cells = <0>;
109
110            port@0 {
111                reg = <0>;
112                endpoint {
113                    remote-endpoint = <&dsi0_in>;
114                };
115            };
116
117            port@2 {
118                reg = <2>;
119                endpoint {
120                    remote-endpoint = <&dp_in>;
121                };
122            };
123        };
124    };
125...