mediatek,hdmi.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Mediatek HDMI Encoder
  8
  9maintainers:
 10  - CK Hu <ck.hu@mediatek.com>
 11  - Jitao shi <jitao.shi@mediatek.com>
 12
 13description: |
 14  The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
 15  its parallel input.
 16
 17properties:
 18  compatible:
 19    enum:
 20      - mediatek,mt2701-hdmi
 21      - mediatek,mt7623-hdmi
 22      - mediatek,mt8167-hdmi
 23      - mediatek,mt8173-hdmi
 24
 25  reg:
 26    maxItems: 1
 27
 28  interrupts:
 29    maxItems: 1
 30
 31  clocks:
 32    items:
 33      - description: Pixel Clock
 34      - description: HDMI PLL
 35      - description: Bit Clock
 36      - description: S/PDIF Clock
 37
 38  clock-names:
 39    items:
 40      - const: pixel
 41      - const: pll
 42      - const: bclk
 43      - const: spdif
 44
 45  phys:
 46    maxItems: 1
 47
 48  phy-names:
 49    items:
 50      - const: hdmi
 51
 52  mediatek,syscon-hdmi:
 53    $ref: /schemas/types.yaml#/definitions/phandle-array
 54    items:
 55      - items:
 56          - description: phandle to system configuration registers
 57          - description: register offset in the system configuration registers
 58    description: |
 59      phandle link and register offset to the system configuration registers.
 60
 61  ports:
 62    $ref: /schemas/graph.yaml#/properties/ports
 63
 64    properties:
 65      port@0:
 66        $ref: /schemas/graph.yaml#/properties/port
 67        description: |
 68          Input port node. This port should be connected to a DPI output port.
 69
 70      port@1:
 71        $ref: /schemas/graph.yaml#/properties/port
 72        description: |
 73          Output port node. This port should be connected to the input port of a connector
 74          node that contains a ddc-i2c-bus property, or to the  input port of an attached
 75          bridge chip, such as a SlimPort transmitter.
 76
 77    required:
 78      - port@0
 79      - port@1
 80
 81required:
 82  - compatible
 83  - reg
 84  - interrupts
 85  - clocks
 86  - clock-names
 87  - phys
 88  - phy-names
 89  - mediatek,syscon-hdmi
 90  - ports
 91
 92additionalProperties: false
 93
 94examples:
 95  - |
 96    #include <dt-bindings/clock/mt8173-clk.h>
 97    #include <dt-bindings/interrupt-controller/arm-gic.h>
 98    #include <dt-bindings/interrupt-controller/irq.h>
 99    hdmi0: hdmi@14025000 {
100        compatible = "mediatek,mt8173-hdmi";
101        reg = <0x14025000 0x400>;
102        interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;
103        clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
104             <&mmsys CLK_MM_HDMI_PLLCK>,
105             <&mmsys CLK_MM_HDMI_AUDIO>,
106             <&mmsys CLK_MM_HDMI_SPDIF>;
107        clock-names = "pixel", "pll", "bclk", "spdif";
108        pinctrl-names = "default";
109        pinctrl-0 = <&hdmi_pin>;
110        phys = <&hdmi_phy>;
111        phy-names = "hdmi";
112        mediatek,syscon-hdmi = <&mmsys 0x900>;
113
114        ports {
115          #address-cells = <1>;
116          #size-cells = <0>;
117
118          port@0 {
119            reg = <0>;
120
121            hdmi0_in: endpoint {
122              remote-endpoint = <&dpi0_out>;
123            };
124          };
125
126          port@1 {
127            reg = <1>;
128
129            hdmi0_out: endpoint {
130              remote-endpoint = <&hdmi_con_in>;
131            };
132          };
133        };
134    };
135
136...