mediatek,gamma.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/mediatek/mediatek,gamma.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Mediatek display gamma correction
  8
  9maintainers:
 10  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
 11  - Philipp Zabel <p.zabel@pengutronix.de>
 12
 13description: |
 14  Mediatek display gamma correction, namely GAMMA, provides a nonlinear
 15  operation used to adjust luminance in display system.
 16  GAMMA device node must be siblings to the central MMSYS_CONFIG node.
 17  For a description of the MMSYS_CONFIG binding, see
 18  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
 19  for details.
 20
 21properties:
 22  compatible:
 23    oneOf:
 24      - enum:
 25          - mediatek,mt8173-disp-gamma
 26          - mediatek,mt8183-disp-gamma
 27          - mediatek,mt8195-disp-gamma
 28      - items:
 29          - enum:
 30              - mediatek,mt6795-disp-gamma
 31          - const: mediatek,mt8173-disp-gamma
 32      - items:
 33          - enum:
 34              - mediatek,mt8186-disp-gamma
 35              - mediatek,mt8188-disp-gamma
 36              - mediatek,mt8192-disp-gamma
 37              - mediatek,mt8195-disp-gamma
 38              - mediatek,mt8365-disp-gamma
 39          - const: mediatek,mt8183-disp-gamma
 40      - items:
 41          - enum:
 42              - mediatek,mt8188-disp-gamma
 43          - const: mediatek,mt8195-disp-gamma
 44
 45  reg:
 46    maxItems: 1
 47
 48  interrupts:
 49    maxItems: 1
 50
 51  power-domains:
 52    description: A phandle and PM domain specifier as defined by bindings of
 53      the power controller specified by phandle. See
 54      Documentation/devicetree/bindings/power/power-domain.yaml for details.
 55
 56  clocks:
 57    items:
 58      - description: GAMMA Clock
 59
 60  mediatek,gce-client-reg:
 61    description: The register of client driver can be configured by gce with
 62      4 arguments defined in this property, such as phandle of gce, subsys id,
 63      register offset and size. Each GCE subsys id is mapping to a client
 64      defined in the header include/dt-bindings/gce/<chip>-gce.h.
 65    $ref: /schemas/types.yaml#/definitions/phandle-array
 66    maxItems: 1
 67
 68  ports:
 69    $ref: /schemas/graph.yaml#/properties/ports
 70
 71    properties:
 72      port@0:
 73        $ref: /schemas/graph.yaml#/properties/port
 74        description: GAMMA input, usually from one of the AAL blocks.
 75
 76      port@1:
 77        $ref: /schemas/graph.yaml#/properties/port
 78        description:
 79          GAMMA output to the input of the next desired component in the
 80          display pipeline, for example one of the available DITHER or
 81          POSTMASK blocks.
 82
 83    required:
 84      - port@0
 85      - port@1
 86
 87required:
 88  - compatible
 89  - reg
 90  - interrupts
 91  - power-domains
 92  - clocks
 93
 94additionalProperties: false
 95
 96examples:
 97  - |
 98    #include <dt-bindings/interrupt-controller/arm-gic.h>
 99    #include <dt-bindings/clock/mt8173-clk.h>
100    #include <dt-bindings/power/mt8173-power.h>
101    #include <dt-bindings/gce/mt8173-gce.h>
102
103    soc {
104        #address-cells = <2>;
105        #size-cells = <2>;
106
107        gamma@14016000 {
108            compatible = "mediatek,mt8173-disp-gamma";
109            reg = <0 0x14016000 0 0x1000>;
110            interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_LOW>;
111            power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
112            clocks = <&mmsys CLK_MM_DISP_GAMMA>;
113            mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>;
114        };
115    };