fsl,imx8qxp-dc-fetchunit.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-fetchunit.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale i.MX8qxp Display Controller Fetch Unit
  8
  9description: |
 10  The Fetch Unit is the interface between the AXI bus for source buffer access
 11  and the internal pixel processing pipeline, which is 30-bit RGB plus 8-bit
 12  Alpha.
 13
 14  It is used to generate foreground planes in Display Controllers and source
 15  planes in Blit Engines, and comprises the following built-in functions to
 16  convert a wide range of frame buffer types.
 17
 18  +---------X-----------------------------------------+
 19  |         |                           Fetch Unit    |
 20  |         V                                         |
 21  |    +---------+                                    |
 22  |    |         |                                    |
 23  |    | Decode  | Decompression [Decode]             |
 24  |    |         |                                    |
 25  |    +---------+                                    |
 26  |         |                                         |
 27  |         V                                         |
 28  |    +---------+                                    |
 29  |    | Clip &  | Clip Window [All]                  |
 30  |    | Overlay | Plane composition [Layer, Warp]    |
 31  |    |         |                                    |
 32  |    +---------+                                    |
 33  |         |                                         |
 34  |         V                                         |
 35  |    +---------+                                    |
 36  |    | Re-     | Flip/Rotate/Repl./Drop [All]       |
 37  X--> | sample  | Perspective/Affine warping [Persp] |
 38  | |  |         | Arbitrary warping [Warp, Persp]    |
 39  | |  +---------+                                    |
 40  | |       |                                         |
 41  | |       V                                         |
 42  | |  +---------+                                    |
 43  | |  |         |                                    |
 44  | |  | Palette | Color Palette [Layer, Decode]      |
 45  | |  |         |                                    |
 46  | |  +---------+                                    |
 47  | |       |                                         |
 48  | |       V                                         |
 49  | |  +---------+                                    |
 50  | |  | Extract | Raw to RGBA/YUV [All]              |
 51  | |  | &       | Bit width expansion [All]          |
 52  | |  | Expand  |                                    |
 53  | |  +---------+                                    |
 54  | |       |                                         |
 55  | |       V                                         |
 56  | |  +---------+                                    |
 57  | |  |         | Planar to packed                   |
 58  | |->| Combine | [Decode, Warp, Persp]              |
 59  | |  |         |                                    |
 60  | |  +---------+                                    |
 61  | |       |                                         |
 62  | |       V                                         |
 63  | |  +---------+                                    |
 64  | |  |         | YUV422 to YUV444                   |
 65  | |  | Chroma  | [Decode, Persp]                    |
 66  | |  |         |                                    |
 67  | |  +---------+                                    |
 68  | |       |                                         |
 69  | |       V                                         |
 70  | |  +---------+                                    |
 71  | |  |         | YUV to RGB                         |
 72  | |  | Color   | [Warp, Persp, Decode, Layer]       |
 73  | |  |         |                                    |
 74  | |  +---------+                                    |
 75  | |       |                                         |
 76  | |       V                                         |
 77  | |  +---------+                                    |
 78  | |  |         | Gamma removal                      |
 79  | |  | Gamma   | [Warp, Persp, Decode, Layer]       |
 80  | |  |         |                                    |
 81  | |  +---------+                                    |
 82  | |       |                                         |
 83  | |       V                                         |
 84  | |  +---------+                                    |
 85  | |  |         | Alpla multiply, RGB pre-multiply   |
 86  |  ->| Multiply| [Warp, Persp, Decode, Layer]       |
 87  |    |         |                                    |
 88  |     ---------                                     |
 89  |         |                                         |
 90  |         V                                         |
 91  |    +---------+                                    |
 92  |    |         | Bilinear filter                    |
 93  |    | Filter  | [Warp, Persp]                      |
 94  |    |         |                                    |
 95  |    +---------+                                    |
 96  |         |                                         |
 97  |         V                                         |
 98  +---------X-----------------------------------------+
 99
100  Note that different derivatives of the Fetch Unit exist. Each implements a
101  specific subset only of the pipeline stages shown above. Restrictions for the
102  units are specified in [square brackets].
103
104maintainers:
105  - Liu Ying <victor.liu@nxp.com>
106
107properties:
108  compatible:
109    enum:
110      - fsl,imx8qxp-dc-fetchdecode
111      - fsl,imx8qxp-dc-fetcheco
112      - fsl,imx8qxp-dc-fetchlayer
113      - fsl,imx8qxp-dc-fetchwarp
114
115  reg:
116    maxItems: 2
117
118  reg-names:
119    items:
120      - const: pec
121      - const: cfg
122
123  fsl,prg:
124    $ref: /schemas/types.yaml#/definitions/phandle
125    description:
126      Optional Prefetch Resolve Gasket associated with the Fetch Unit.
127
128required:
129  - compatible
130  - reg
131  - reg-names
132
133additionalProperties: false
134
135examples:
136  - |
137    fetchlayer@56180ac0 {
138        compatible = "fsl,imx8qxp-dc-fetchlayer";
139        reg = <0x56180ac0 0xc>, <0x56188400 0x404>;
140        reg-names = "pec", "cfg";
141    };