samsung,mipi-dsim.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung MIPI DSIM bridge controller
  8
  9maintainers:
 10  - Inki Dae <inki.dae@samsung.com>
 11  - Jagan Teki <jagan@amarulasolutions.com>
 12  - Marek Szyprowski <m.szyprowski@samsung.com>
 13
 14description: |
 15  Samsung MIPI DSIM bridge controller can be found it on Exynos
 16  and i.MX8M Mini/Nano/Plus SoC's.
 17
 18properties:
 19  compatible:
 20    oneOf:
 21      - enum:
 22          - samsung,exynos3250-mipi-dsi
 23          - samsung,exynos4210-mipi-dsi
 24          - samsung,exynos5410-mipi-dsi
 25          - samsung,exynos5422-mipi-dsi
 26          - samsung,exynos5433-mipi-dsi
 27          - samsung,exynos7870-mipi-dsi
 28          - fsl,imx8mm-mipi-dsim
 29          - fsl,imx8mp-mipi-dsim
 30      - items:
 31          - enum:
 32              - fsl,imx7d-mipi-dsim
 33              - fsl,imx8mn-mipi-dsim
 34          - const: fsl,imx8mm-mipi-dsim
 35
 36  reg:
 37    maxItems: 1
 38
 39  interrupts:
 40    maxItems: 1
 41
 42  '#address-cells':
 43    const: 1
 44
 45  '#size-cells':
 46    const: 0
 47
 48  clocks:
 49    minItems: 2
 50    maxItems: 5
 51
 52  clock-names:
 53    minItems: 2
 54    maxItems: 5
 55
 56  samsung,phy-type:
 57    $ref: /schemas/types.yaml#/definitions/uint32
 58    description: phandle to the samsung phy-type
 59
 60  power-domains:
 61    maxItems: 1
 62
 63  samsung,power-domain:
 64    $ref: /schemas/types.yaml#/definitions/phandle
 65    description: phandle to the associated samsung power domain
 66
 67  vddcore-supply:
 68    description: MIPI DSIM Core voltage supply (e.g. 1.1V)
 69
 70  vddio-supply:
 71    description: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
 72
 73  samsung,burst-clock-frequency:
 74    $ref: /schemas/types.yaml#/definitions/uint32
 75    description:
 76      DSIM high speed burst mode frequency.  If absent,
 77      the pixel clock from the attached device or bridge
 78      will be used instead.
 79
 80  samsung,esc-clock-frequency:
 81    $ref: /schemas/types.yaml#/definitions/uint32
 82    description:
 83      DSIM escape mode frequency.
 84
 85  samsung,pll-clock-frequency:
 86    $ref: /schemas/types.yaml#/definitions/uint32
 87    description:
 88      DSIM oscillator clock frequency. If absent, the clock frequency
 89      of sclk_mipi will be used instead.
 90
 91  phys:
 92    maxItems: 1
 93
 94  phy-names:
 95    const: dsim
 96
 97  ports:
 98    $ref: /schemas/graph.yaml#/properties/ports
 99
100    properties:
101      port@0:
102        $ref: /schemas/graph.yaml#/properties/port
103        description:
104          Input port node to receive pixel data from the
105          display controller. Exactly one endpoint must be
106          specified.
107
108      port@1:
109        $ref: /schemas/graph.yaml#/$defs/port-base
110        unevaluatedProperties: false
111        description:
112          DSI output port node to the panel or the next bridge
113          in the chain.
114
115        properties:
116          endpoint:
117            $ref: /schemas/media/video-interfaces.yaml#
118            unevaluatedProperties: false
119
120            properties:
121              data-lanes:
122                minItems: 1
123                maxItems: 4
124                uniqueItems: true
125                items:
126                  enum: [ 1, 2, 3, 4 ]
127
128              lane-polarities:
129                minItems: 1
130                maxItems: 5
131                description:
132                  The Samsung MIPI DSI IP requires that all the data lanes have
133                  the same polarity.
134
135            dependencies:
136              lane-polarities: [data-lanes]
137
138required:
139  - clock-names
140  - clocks
141  - compatible
142  - interrupts
143  - reg
144  - samsung,esc-clock-frequency
145
146allOf:
147  - $ref: ../dsi-controller.yaml#
148  - if:
149      properties:
150        compatible:
151          contains:
152            const: samsung,exynos7870-mipi-dsi
153
154    then:
155      properties:
156        clocks:
157          minItems: 4
158          maxItems: 4
159
160        clock-names:
161          items:
162            - const: bus
163            - const: pll
164            - const: byte
165            - const: esc
166
167        ports:
168          required:
169            - port@0
170
171      required:
172        - ports
173
174  - if:
175      properties:
176        compatible:
177          contains:
178            const: samsung,exynos5433-mipi-dsi
179
180    then:
181      properties:
182        clocks:
183          minItems: 5
184
185        clock-names:
186          items:
187            - const: bus_clk
188            - const: phyclk_mipidphy0_bitclkdiv8
189            - const: phyclk_mipidphy0_rxclkesc0
190            - const: sclk_rgb_vclk_to_dsim0
191            - const: sclk_mipi
192
193        ports:
194          required:
195            - port@0
196
197      required:
198        - ports
199        - vddcore-supply
200        - vddio-supply
201
202  - if:
203      properties:
204        compatible:
205          contains:
206            const: samsung,exynos5410-mipi-dsi
207
208    then:
209      properties:
210        clocks:
211          minItems: 2
212
213        clock-names:
214          items:
215            - const: bus_clk
216            - const: pll_clk
217
218      required:
219        - vddcore-supply
220        - vddio-supply
221
222  - if:
223      properties:
224        compatible:
225          contains:
226            const: samsung,exynos4210-mipi-dsi
227
228    then:
229      properties:
230        clocks:
231          minItems: 2
232
233        clock-names:
234          items:
235            - const: bus_clk
236            - const: sclk_mipi
237
238      required:
239        - vddcore-supply
240        - vddio-supply
241
242  - if:
243      properties:
244        compatible:
245          contains:
246            const: samsung,exynos3250-mipi-dsi
247
248    then:
249      properties:
250        clocks:
251          minItems: 2
252
253        clock-names:
254          items:
255            - const: bus_clk
256            - const: pll_clk
257
258      required:
259        - vddcore-supply
260        - vddio-supply
261        - samsung,phy-type
262
263additionalProperties:
264  type: object
265
266examples:
267  - |
268    #include <dt-bindings/clock/exynos5433.h>
269    #include <dt-bindings/gpio/gpio.h>
270    #include <dt-bindings/interrupt-controller/arm-gic.h>
271
272    dsi@13900000 {
273        compatible = "samsung,exynos5433-mipi-dsi";
274        reg = <0x13900000 0xC0>;
275        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
276        phys = <&mipi_phy 1>;
277        phy-names = "dsim";
278        clocks = <&cmu_disp CLK_PCLK_DSIM0>,
279                 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8>,
280                 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>,
281                 <&cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0>,
282                 <&cmu_disp CLK_SCLK_DSIM0>;
283        clock-names = "bus_clk",
284                      "phyclk_mipidphy0_bitclkdiv8",
285                      "phyclk_mipidphy0_rxclkesc0",
286                      "sclk_rgb_vclk_to_dsim0",
287                      "sclk_mipi";
288        power-domains = <&pd_disp>;
289        vddcore-supply = <&ldo6_reg>;
290        vddio-supply = <&ldo7_reg>;
291        samsung,burst-clock-frequency = <512000000>;
292        samsung,esc-clock-frequency = <16000000>;
293        samsung,pll-clock-frequency = <24000000>;
294        pinctrl-names = "default";
295        pinctrl-0 = <&te_irq>;
296
297        ports {
298            #address-cells = <1>;
299            #size-cells = <0>;
300
301            port@0 {
302                reg = <0>;
303
304                dsi_to_mic: endpoint {
305                    remote-endpoint = <&mic_to_dsi>;
306                };
307            };
308        };
309    };