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amlogic,meson-vpu.yaml
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linux-6.19.14/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2019 BayLibre, SAS 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Amlogic Meson Display Controller 9 10maintainers: 11 - Neil Armstrong <neil.armstrong@linaro.org> 12 13description: | 14 The Amlogic Meson Display controller is composed of several components 15 that are going to be documented below 16 17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------| 18 | vd1 _______ _____________ _________________ | | 19 D |-------| |----| | | | | HDMI PLL | 20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK | 21 R |-------| |----| Processing | | | | | 22 | osd2 | | | |---| Enci ----------|----|-----VDAC------| 23 R |-------| CSC |----| Scalers | | Encp ----------|----|----HDMI-TX----| 24 A | osd1 | | | Blenders | | Encl ----------|----|---------------| 25 M |-------|______|----|____________| |________________| | | 26 ___|__________________________________________________________|_______________| 27 28 VIU: Video Input Unit 29 --------------------- 30 31 The Video Input Unit is in charge of the pixel scanout from the DDR memory. 32 It fetches the frames addresses, stride and parameters from the "Canvas" memory. 33 This part is also in charge of the CSC (Colorspace Conversion). 34 It can handle 2 OSD Planes and 2 Video Planes. 35 36 VPP: Video Post Processing 37 -------------------------- 38 39 The Video Post Processing is in charge of the scaling and blending of the 40 various planes into a single pixel stream. 41 There is a special "pre-blending" used by the video planes with a dedicated 42 scaler and a "post-blending" to merge with the OSD Planes. 43 The OSD planes also have a dedicated scaler for one of the OSD. 44 45 VENC: Video Encoders 46 -------------------- 47 48 The VENC is composed of the multiple pixel encoders 49 - ENCI : Interlace Video encoder for CVBS and Interlace HDMI 50 - ENCP : Progressive Video Encoder for HDMI 51 - ENCL : LCD LVDS Encoder 52 The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock 53 tree and provides the scanout clock to the VPP and VIU. 54 The ENCI is connected to a single VDAC for Composite Output. 55 The ENCI and ENCP are connected to an on-chip HDMI Transceiver. 56 57properties: 58 compatible: 59 oneOf: 60 - items: 61 - enum: 62 - amlogic,meson-gxbb-vpu # GXBB (S905) 63 - amlogic,meson-gxl-vpu # GXL (S905X, S905D) 64 - amlogic,meson-gxm-vpu # GXM (S912) 65 - const: amlogic,meson-gx-vpu 66 - enum: 67 - amlogic,meson-g12a-vpu # G12A (S905X2, S905Y2, S905D2) 68 69 reg: 70 maxItems: 2 71 72 reg-names: 73 items: 74 - const: vpu 75 - const: hhi 76 77 interrupts: 78 maxItems: 1 79 80 amlogic,canvas: 81 description: should point to a canvas provider node 82 $ref: /schemas/types.yaml#/definitions/phandle 83 84 power-domains: 85 maxItems: 1 86 description: phandle to the associated power domain 87 88 port@0: 89 $ref: /schemas/graph.yaml#/properties/port 90 description: 91 A port node pointing to the CVBS VDAC port node. 92 93 port@1: 94 $ref: /schemas/graph.yaml#/properties/port 95 description: 96 A port node pointing to the HDMI-TX port node. 97 98 port@2: 99 $ref: /schemas/graph.yaml#/properties/port 100 description: 101 A port node pointing to the DPI port node (e.g. DSI or LVDS transceiver). 102 103 "#address-cells": 104 const: 1 105 106 "#size-cells": 107 const: 0 108 109required: 110 - compatible 111 - reg 112 - interrupts 113 - port@0 114 - port@1 115 - "#address-cells" 116 - "#size-cells" 117 - amlogic,canvas 118 119additionalProperties: false 120 121examples: 122 - | 123 vpu: vpu@d0100000 { 124 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; 125 reg = <0xd0100000 0x100000>, <0xc883c000 0x1000>; 126 reg-names = "vpu", "hhi"; 127 interrupts = <3>; 128 #address-cells = <1>; 129 #size-cells = <0>; 130 amlogic,canvas = <&canvas>; 131 132 /* CVBS VDAC output port */ 133 port@0 { 134 reg = <0>; 135 136 cvbs_vdac_out: endpoint { 137 remote-endpoint = <&tv_connector_in>; 138 }; 139 }; 140 141 /* HDMI TX output port */ 142 port@1 { 143 reg = <1>; 144 145 hdmi_tx_out: endpoint { 146 remote-endpoint = <&hdmi_tx_in>; 147 }; 148 }; 149 };
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