fsl,sec2.0.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
  8
  9maintainers:
 10  - J. Neuschäfer <j.ne@posteo.net>
 11
 12properties:
 13  compatible:
 14    description:
 15      Should contain entries for this and backward compatible SEC versions,
 16      high to low. Warning - SEC1 and SEC2 are mutually exclusive.
 17    oneOf:
 18      - items:
 19          - const: fsl,sec3.3
 20          - const: fsl,sec3.1
 21          - const: fsl,sec3.0
 22          - const: fsl,sec2.4
 23          - const: fsl,sec2.2
 24          - const: fsl,sec2.1
 25          - const: fsl,sec2.0
 26      - items:
 27          - const: fsl,sec3.1
 28          - const: fsl,sec3.0
 29          - const: fsl,sec2.4
 30          - const: fsl,sec2.2
 31          - const: fsl,sec2.1
 32          - const: fsl,sec2.0
 33      - items:
 34          - const: fsl,sec3.0
 35          - const: fsl,sec2.4
 36          - const: fsl,sec2.2
 37          - const: fsl,sec2.1
 38          - const: fsl,sec2.0
 39      - items:
 40          - const: fsl,sec2.4
 41          - const: fsl,sec2.2
 42          - const: fsl,sec2.1
 43          - const: fsl,sec2.0
 44      - items:
 45          - const: fsl,sec2.2
 46          - const: fsl,sec2.1
 47          - const: fsl,sec2.0
 48      - items:
 49          - const: fsl,sec2.1
 50          - const: fsl,sec2.0
 51      - items:
 52          - const: fsl,sec2.0
 53      - items:
 54          - const: fsl,sec1.2
 55          - const: fsl,sec1.0
 56      - items:
 57          - const: fsl,sec1.0
 58
 59  reg:
 60    maxItems: 1
 61
 62  interrupts:
 63    maxItems: 1
 64
 65  fsl,num-channels:
 66    $ref: /schemas/types.yaml#/definitions/uint32
 67    enum: [ 1, 4 ]
 68    description: An integer representing the number of channels available.
 69
 70  fsl,channel-fifo-len:
 71    $ref: /schemas/types.yaml#/definitions/uint32
 72    maximum: 100
 73    description:
 74      An integer representing the number of descriptor pointers each channel
 75      fetch fifo can hold.
 76
 77  fsl,exec-units-mask:
 78    $ref: /schemas/types.yaml#/definitions/uint32
 79    maximum: 0xfff
 80    description: |
 81      The bitmask representing what execution units (EUs) are available.
 82      EU information should be encoded following the SEC's Descriptor Header
 83      Dword EU_SEL0 field documentation, i.e. as follows:
 84
 85        bit 0  = reserved - should be 0
 86        bit 1  = set if SEC has the ARC4 EU (AFEU)
 87        bit 2  = set if SEC has the DES/3DES EU (DEU)
 88        bit 3  = set if SEC has the message digest EU (MDEU/MDEU-A)
 89        bit 4  = set if SEC has the random number generator EU (RNG)
 90        bit 5  = set if SEC has the public key EU (PKEU)
 91        bit 6  = set if SEC has the AES EU (AESU)
 92        bit 7  = set if SEC has the Kasumi EU (KEU)
 93        bit 8  = set if SEC has the CRC EU (CRCU)
 94        bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
 95
 96      remaining bits are reserved for future SEC EUs.
 97
 98  fsl,descriptor-types-mask:
 99    $ref: /schemas/types.yaml#/definitions/uint32
100    description: |
101      The bitmask representing what descriptors are available. Descriptor type
102      information should be encoded following the SEC's Descriptor Header Dword
103      DESC_TYPE field documentation, i.e. as follows:
104
105        bit 0  = SEC supports descriptor type aesu_ctr_nonsnoop
106        bit 1  = SEC supports descriptor type ipsec_esp
107        bit 2  = SEC supports descriptor type common_nonsnoop
108        bit 3  = SEC supports descriptor type 802.11i AES ccmp
109        bit 4  = SEC supports descriptor type hmac_snoop_no_afeu
110        bit 5  = SEC supports descriptor type srtp
111        bit 6  = SEC supports descriptor type non_hmac_snoop_no_afeu
112        bit 7  = SEC supports descriptor type pkeu_assemble
113        bit 8  = SEC supports descriptor type aesu_key_expand_output
114        bit 9  = SEC supports descriptor type pkeu_ptmul
115        bit 10 = SEC supports descriptor type common_nonsnoop_afeu
116        bit 11 = SEC supports descriptor type pkeu_ptadd_dbl
117
118      ..and so on and so forth.
119
120required:
121  - compatible
122  - reg
123  - fsl,num-channels
124  - fsl,channel-fifo-len
125  - fsl,exec-units-mask
126  - fsl,descriptor-types-mask
127
128unevaluatedProperties: false
129
130examples:
131  - |
132    /* MPC8548E */
133    crypto@30000 {
134        compatible = "fsl,sec2.1", "fsl,sec2.0";
135        reg = <0x30000 0x10000>;
136        interrupts = <29 2>;
137        interrupt-parent = <&mpic>;
138        fsl,num-channels = <4>;
139        fsl,channel-fifo-len = <24>;
140        fsl,exec-units-mask = <0xfe>;
141        fsl,descriptor-types-mask = <0x12b0ebf>;
142    };
143
144...