starfive,jh7110-syscrg.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: StarFive JH7110 System Clock and Reset Generator
  8
  9maintainers:
 10  - Emil Renner Berthing <kernel@esmil.dk>
 11
 12properties:
 13  compatible:
 14    const: starfive,jh7110-syscrg
 15
 16  reg:
 17    maxItems: 1
 18
 19  clocks:
 20    oneOf:
 21      - items:
 22          - description: Main Oscillator (24 MHz)
 23          - description: GMAC1 RMII reference or GMAC1 RGMII RX
 24          - description: External I2S TX bit clock
 25          - description: External I2S TX left/right channel clock
 26          - description: External I2S RX bit clock
 27          - description: External I2S RX left/right channel clock
 28          - description: External TDM clock
 29          - description: External audio master clock
 30          - description: PLL0
 31          - description: PLL1
 32          - description: PLL2
 33
 34      - items:
 35          - description: Main Oscillator (24 MHz)
 36          - description: GMAC1 RMII reference
 37          - description: GMAC1 RGMII RX
 38          - description: External I2S TX bit clock
 39          - description: External I2S TX left/right channel clock
 40          - description: External I2S RX bit clock
 41          - description: External I2S RX left/right channel clock
 42          - description: External TDM clock
 43          - description: External audio master clock
 44          - description: PLL0
 45          - description: PLL1
 46          - description: PLL2
 47
 48  clock-names:
 49    oneOf:
 50      - items:
 51          - const: osc
 52          - enum:
 53              - gmac1_rmii_refin
 54              - gmac1_rgmii_rxin
 55          - const: i2stx_bclk_ext
 56          - const: i2stx_lrck_ext
 57          - const: i2srx_bclk_ext
 58          - const: i2srx_lrck_ext
 59          - const: tdm_ext
 60          - const: mclk_ext
 61          - const: pll0_out
 62          - const: pll1_out
 63          - const: pll2_out
 64
 65      - items:
 66          - const: osc
 67          - const: gmac1_rmii_refin
 68          - const: gmac1_rgmii_rxin
 69          - const: i2stx_bclk_ext
 70          - const: i2stx_lrck_ext
 71          - const: i2srx_bclk_ext
 72          - const: i2srx_lrck_ext
 73          - const: tdm_ext
 74          - const: mclk_ext
 75          - const: pll0_out
 76          - const: pll1_out
 77          - const: pll2_out
 78
 79  '#clock-cells':
 80    const: 1
 81    description:
 82      See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
 83
 84  '#reset-cells':
 85    const: 1
 86    description:
 87      See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
 88
 89required:
 90  - compatible
 91  - reg
 92  - clocks
 93  - clock-names
 94  - '#clock-cells'
 95  - '#reset-cells'
 96
 97additionalProperties: false
 98
 99examples:
100  - |
101    clock-controller@13020000 {
102        compatible = "starfive,jh7110-syscrg";
103        reg = <0x13020000 0x10000>;
104        clocks = <&osc>, <&gmac1_rmii_refin>,
105                 <&gmac1_rgmii_rxin>,
106                 <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
107                 <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
108                 <&tdm_ext>, <&mclk_ext>,
109                 <&pllclk 0>, <&pllclk 1>, <&pllclk 2>;
110        clock-names = "osc", "gmac1_rmii_refin",
111                      "gmac1_rgmii_rxin",
112                      "i2stx_bclk_ext", "i2stx_lrck_ext",
113                      "i2srx_bclk_ext", "i2srx_lrck_ext",
114                      "tdm_ext", "mclk_ext",
115                      "pll0_out", "pll1_out", "pll2_out";
116        #clock-cells = <1>;
117        #reset-cells = <1>;
118    };