starfive,jh7110-aoncrg.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: StarFive JH7110 Always-On Clock and Reset Generator
  8
  9maintainers:
 10  - Emil Renner Berthing <kernel@esmil.dk>
 11
 12properties:
 13  compatible:
 14    const: starfive,jh7110-aoncrg
 15
 16  reg:
 17    maxItems: 1
 18
 19  clocks:
 20    oneOf:
 21      - items:
 22          - description: Main Oscillator (24 MHz)
 23          - description: GMAC0 RMII reference or GMAC0 RGMII RX
 24          - description: STG AXI/AHB
 25          - description: APB Bus
 26          - description: GMAC0 GTX
 27
 28      - items:
 29          - description: Main Oscillator (24 MHz)
 30          - description: GMAC0 RMII reference or GMAC0 RGMII RX
 31          - description: STG AXI/AHB or GMAC0 RGMII RX
 32          - description: APB Bus or STG AXI/AHB
 33          - description: GMAC0 GTX or APB Bus
 34          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX
 35
 36      - items:
 37          - description: Main Oscillator (24 MHz)
 38          - description: GMAC0 RMII reference
 39          - description: GMAC0 RGMII RX
 40          - description: STG AXI/AHB
 41          - description: APB Bus
 42          - description: GMAC0 GTX
 43          - description: RTC Oscillator (32.768 kHz)
 44
 45  clock-names:
 46    oneOf:
 47      - minItems: 5
 48        items:
 49          - const: osc
 50          - enum:
 51              - gmac0_rmii_refin
 52              - gmac0_rgmii_rxin
 53          - const: stg_axiahb
 54          - const: apb_bus
 55          - const: gmac0_gtxclk
 56          - const: rtc_osc
 57
 58      - minItems: 6
 59        items:
 60          - const: osc
 61          - const: gmac0_rmii_refin
 62          - const: gmac0_rgmii_rxin
 63          - const: stg_axiahb
 64          - const: apb_bus
 65          - const: gmac0_gtxclk
 66          - const: rtc_osc
 67
 68  '#clock-cells':
 69    const: 1
 70    description:
 71      See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
 72
 73  '#reset-cells':
 74    const: 1
 75    description:
 76      See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
 77
 78required:
 79  - compatible
 80  - reg
 81  - clocks
 82  - clock-names
 83  - '#clock-cells'
 84  - '#reset-cells'
 85
 86additionalProperties: false
 87
 88examples:
 89  - |
 90    #include <dt-bindings/clock/starfive,jh7110-crg.h>
 91
 92    clock-controller@17000000 {
 93        compatible = "starfive,jh7110-aoncrg";
 94        reg = <0x17000000 0x10000>;
 95        clocks = <&osc>, <&gmac0_rmii_refin>,
 96                 <&gmac0_rgmii_rxin>,
 97                 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
 98                 <&syscrg JH7110_SYSCLK_APB_BUS>,
 99                 <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>,
100                 <&rtc_osc>;
101        clock-names = "osc", "gmac0_rmii_refin",
102                      "gmac0_rgmii_rxin", "stg_axiahb",
103                      "apb_bus", "gmac0_gtxclk",
104                      "rtc_osc";
105        #clock-cells = <1>;
106        #reset-cells = <1>;
107    };