st,stm32mp1-rcc.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: STMicroelectronics STM32MP1 Reset Clock Controller
  8
  9maintainers:
 10  - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
 11
 12description: |
 13  The RCC IP is both a reset and a clock controller.
 14  RCC makes also power management (resume/supend and wakeup interrupt).
 15  Please also refer to reset.txt for common reset controller binding usage.
 16
 17  This binding uses common clock bindings
 18  Documentation/devicetree/bindings/clock/clock-bindings.txt
 19
 20  Specifying clocks
 21  =================
 22
 23  All available clocks are defined as preprocessor macros in
 24  include/dt-bindings/clock/stm32mp1-clks.h header and can be used in device
 25  tree sources.
 26
 27  Specifying softreset control of devices
 28  =======================================
 29
 30  Device nodes should specify the reset channel required in their "resets"
 31  property, containing a phandle to the reset device node and an index specifying
 32  which channel to use.
 33  The index is the bit number within the RCC registers bank, starting from RCC
 34  base address.
 35  It is calculated as: index = register_offset / 4 * 32 + bit_offset.
 36  Where bit_offset is the bit offset within the register.
 37
 38  For example on STM32MP1, for LTDC reset:
 39     ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
 40          = 0x180 / 4 * 32 + 0 = 3072
 41
 42  The list of valid indices for STM32MP1 is available in:
 43  include/dt-bindings/reset/stm32mp1-resets.h
 44  include/dt-bindings/reset/stm32mp13-resets.h
 45
 46  This file implements defines like:
 47  #define LTDC_R	3072
 48
 49properties:
 50  "#clock-cells":
 51    const: 1
 52
 53  "#reset-cells":
 54    const: 1
 55
 56  compatible:
 57    items:
 58      - enum:
 59          - st,stm32mp1-rcc-secure
 60          - st,stm32mp1-rcc
 61          - st,stm32mp13-rcc
 62      - const: syscon
 63
 64  clocks:
 65    minItems: 1
 66    maxItems: 5
 67
 68  clock-names:
 69    minItems: 1
 70    maxItems: 5
 71
 72  reg:
 73    maxItems: 1
 74
 75required:
 76  - "#clock-cells"
 77  - "#reset-cells"
 78  - compatible
 79  - reg
 80
 81if:
 82  properties:
 83    compatible:
 84      contains:
 85        enum:
 86          - st,stm32mp1-rcc-secure
 87          - st,stm32mp13-rcc
 88then:
 89  properties:
 90    clocks:
 91      description: Specifies oscillators.
 92      maxItems: 5
 93
 94    clock-names:
 95      items:
 96        - const: hse
 97        - const: hsi
 98        - const: csi
 99        - const: lse
100        - const: lsi
101  required:
102    - clocks
103    - clock-names
104else:
105  properties:
106    clocks:
107      description:
108        Specifies the external RX clock for ethernet MAC.
109      maxItems: 1
110
111    clock-names:
112      const: ETH_RX_CLK/ETH_REF_CLK
113
114additionalProperties: false
115
116examples:
117  - |
118    #include <dt-bindings/clock/stm32mp1-clks.h>
119    rcc: rcc@50000000 {
120        compatible = "st,stm32mp1-rcc-secure", "syscon";
121        reg = <0x50000000 0x1000>;
122        #clock-cells = <1>;
123        #reset-cells = <1>;
124        clock-names = "hse", "hsi", "csi", "lse", "lsi";
125        clocks = <&scmi_clk CK_SCMI_HSE>,
126                 <&scmi_clk CK_SCMI_HSI>,
127                 <&scmi_clk CK_SCMI_CSI>,
128                 <&scmi_clk CK_SCMI_LSE>,
129                 <&scmi_clk CK_SCMI_LSI>;
130    };
131...