samsung,exynos990-clock.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Samsung Exynos990 SoC clock controller
  8
  9maintainers:
 10  - Igor Belwon <igor.belwon@mentallysanemainliners.org>
 11  - Chanwoo Choi <cw00.choi@samsung.com>
 12  - Krzysztof Kozlowski <krzk@kernel.org>
 13
 14description: |
 15  Exynos990 clock controller is comprised of several CMU units, generating
 16  clocks for different domains. Those CMU units are modeled as separate device
 17  tree nodes, and might depend on each other. The root clock in that root tree
 18  is an external clock: OSCCLK (26 MHz). This external clock must be defined
 19  as a fixed-rate clock in dts.
 20
 21  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
 22  dividers; all other clocks of function blocks (other CMUs) are usually
 23  derived from CMU_TOP.
 24
 25  Each clock is assigned an identifier and client nodes can use this identifier
 26  to specify the clock which they consume. All clocks available for usage
 27  in clock consumer nodes are defined as preprocessor macros in
 28  'include/dt-bindings/clock/samsung,exynos990.h' header.
 29
 30properties:
 31  compatible:
 32    enum:
 33      - samsung,exynos990-cmu-peric1
 34      - samsung,exynos990-cmu-peric0
 35      - samsung,exynos990-cmu-hsi0
 36      - samsung,exynos990-cmu-peris
 37      - samsung,exynos990-cmu-top
 38
 39  clocks:
 40    minItems: 1
 41    maxItems: 5
 42
 43  clock-names:
 44    minItems: 1
 45    maxItems: 5
 46
 47  "#clock-cells":
 48    const: 1
 49
 50  reg:
 51    maxItems: 1
 52
 53required:
 54  - compatible
 55  - clocks
 56  - clock-names
 57  - "#clock-cells"
 58  - reg
 59
 60allOf:
 61  - if:
 62      properties:
 63        compatible:
 64          contains:
 65            enum:
 66              - samsung,exynos990-cmu-peric1
 67              - samsung,exynos990-cmu-peric0
 68
 69    then:
 70      properties:
 71        clocks:
 72          items:
 73            - description: External reference clock (26 MHz)
 74            - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP)
 75            - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP)
 76
 77        clock-names:
 78          items:
 79            - const: oscclk
 80            - const: bus
 81            - const: ip
 82
 83  - if:
 84      properties:
 85        compatible:
 86          contains:
 87            const: samsung,exynos990-cmu-hsi0
 88
 89    then:
 90      properties:
 91        clocks:
 92          items:
 93            - description: External reference clock (26 MHz)
 94            - description: CMU_HSI0 BUS clock (from CMU_TOP)
 95            - description: CMU_HSI0 USB31DRD clock (from CMU_TOP)
 96            - description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP)
 97            - description: CMU_HSI0 DPGTC clock (from CMU_TOP)
 98
 99        clock-names:
100          items:
101            - const: oscclk
102            - const: bus
103            - const: usb31drd
104            - const: usbdp_debug
105            - const: dpgtc
106
107  - if:
108      properties:
109        compatible:
110          contains:
111            const: samsung,exynos990-cmu-peris
112
113    then:
114      properties:
115        clocks:
116          items:
117            - description: External reference clock (26 MHz)
118            - description: CMU_PERIS BUS clock (from CMU_TOP)
119
120        clock-names:
121          items:
122            - const: oscclk
123            - const: bus
124
125  - if:
126      properties:
127        compatible:
128          contains:
129            const: samsung,exynos990-cmu-top
130
131    then:
132      properties:
133        clocks:
134          items:
135            - description: External reference clock (26 MHz)
136
137        clock-names:
138          items:
139            - const: oscclk
140
141additionalProperties: false
142
143examples:
144  - |
145    #include <dt-bindings/clock/samsung,exynos990.h>
146
147    cmu_hsi0: clock-controller@10a00000 {
148        compatible = "samsung,exynos990-cmu-hsi0";
149        reg = <0x10a00000 0x8000>;
150        #clock-cells = <1>;
151
152        clocks = <&oscclk>,
153                 <&cmu_top CLK_DOUT_CMU_HSI0_BUS>,
154                 <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>,
155                 <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>,
156                 <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>;
157        clock-names = "oscclk",
158                      "bus",
159                      "usb31drd",
160                      "usbdp_debug",
161                      "dpgtc";
162    };
163
164...