rockchip,rk3562-cru.yaml

 1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/clock/rockchip,rk3562-cru.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: Rockchip rk3562 Clock and Reset Control Module
 8
 9maintainers:
10  - Elaine Zhang <zhangqing@rock-chips.com>
11  - Heiko Stuebner <heiko@sntech.de>
12
13description:
14  The RK3562 clock controller generates the clock and also implements a reset
15  controller for SoC peripherals. For example it provides SCLK_UART2 and
16  PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
17  module.
18
19properties:
20  compatible:
21    const: rockchip,rk3562-cru
22
23  reg:
24    maxItems: 1
25
26  "#clock-cells":
27    const: 1
28
29  "#reset-cells":
30    const: 1
31
32  clocks:
33    maxItems: 2
34
35  clock-names:
36    items:
37      - const: xin24m
38      - const: xin32k
39
40required:
41  - compatible
42  - reg
43  - "#clock-cells"
44  - "#reset-cells"
45
46additionalProperties: false
47
48examples:
49  - |
50    clock-controller@ff100000 {
51      compatible = "rockchip,rk3562-cru";
52      reg = <0xff100000 0x40000>;
53      #clock-cells = <1>;
54      #reset-cells = <1>;
55    };