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imx8m-clock.yaml

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linux-6.19.14/Documentation/devicetree/bindings/clock/imx8m-clock.yaml YAML
  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: NXP i.MX8M Family Clock Control Module
  8
  9maintainers:
 10  - Abel Vesa <abelvesa@kernel.org>
 11  - Peng Fan <peng.fan@nxp.com>
 12
 13description: |
 14  NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
 15  controller, which generates and supplies to all modules.
 16
 17properties:
 18  compatible:
 19    enum:
 20      - fsl,imx8mm-ccm
 21      - fsl,imx8mn-ccm
 22      - fsl,imx8mp-ccm
 23      - fsl,imx8mq-ccm
 24
 25  reg:
 26    maxItems: 1
 27
 28  interrupts:
 29    maxItems: 2
 30
 31  clocks:
 32    minItems: 6
 33    maxItems: 7
 34
 35  clock-names:
 36    minItems: 6
 37    maxItems: 7
 38
 39  '#clock-cells':
 40    const: 1
 41    description:
 42      The clock consumer should specify the desired clock by having the clock
 43      ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
 44      for the full list of i.MX8M clock IDs.
 45
 46  fsl,operating-mode:
 47    $ref: /schemas/types.yaml#/definitions/string
 48    enum: [nominal, overdrive]
 49    description:
 50      The operating mode of the SoC. This affects the maximum clock rates that
 51      can safely be configured by the clock controller.
 52
 53required:
 54  - compatible
 55  - reg
 56  - clocks
 57  - clock-names
 58  - '#clock-cells'
 59
 60allOf:
 61  - if:
 62      properties:
 63        compatible:
 64          contains:
 65            const: fsl,imx8mq-ccm
 66    then:
 67      properties:
 68        clocks:
 69          items:
 70            - description: 32k osc
 71            - description: 25m osc
 72            - description: 27m osc
 73            - description: ext1 clock input
 74            - description: ext2 clock input
 75            - description: ext3 clock input
 76            - description: ext4 clock input
 77        clock-names:
 78          items:
 79            - const: ckil
 80            - const: osc_25m
 81            - const: osc_27m
 82            - const: clk_ext1
 83            - const: clk_ext2
 84            - const: clk_ext3
 85            - const: clk_ext4
 86    else:
 87      properties:
 88        clocks:
 89          items:
 90            - description: 32k osc
 91            - description: 24m osc
 92            - description: ext1 clock input
 93            - description: ext2 clock input
 94            - description: ext3 clock input
 95            - description: ext4 clock input
 96
 97        clock-names:
 98          items:
 99            - const: osc_32k
100            - const: osc_24m
101            - const: clk_ext1
102            - const: clk_ext2
103            - const: clk_ext3
104            - const: clk_ext4
105
106additionalProperties: false
107
108examples:
109  # Clock Control Module node:
110  - |
111    clock-controller@30380000 {
112        compatible = "fsl,imx8mm-ccm";
113        reg = <0x30380000 0x10000>;
114        #clock-cells = <1>;
115        clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
116                 <&clk_ext3>, <&clk_ext4>;
117        clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
118                      "clk_ext3", "clk_ext4";
119        fsl,operating-mode = "nominal";
120    };
121
122  - |
123    clock-controller@30380000 {
124        compatible = "fsl,imx8mq-ccm";
125        reg = <0x30380000 0x10000>;
126        #clock-cells = <1>;
127        clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
128                 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
129        clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
130                      "clk_ext2", "clk_ext3", "clk_ext4";
131    };
132
133...
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