imx31-clock.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/imx31-clock.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Freescale i.MX31 Clock Controller
  8
  9maintainers:
 10  - Fabio Estevam <festevam@gmail.com>
 11
 12description: |
 13  The clock consumer should specify the desired clock by having the clock
 14  ID in its "clocks" phandle cell. The following is a full list of i.MX31
 15  clocks and IDs.
 16
 17        Clock		    ID
 18        -----------------------
 19        dummy	             0
 20        ckih                 1
 21        ckil                 2
 22        mpll                 3
 23        spll                 4
 24        upll                 5
 25        mcu_main             6
 26        hsp                  7
 27        ahb                  8
 28        nfc                  9
 29        ipg                  10
 30        per_div              11
 31        per                  12
 32        csi_sel              13
 33        fir_sel              14
 34        csi_div              15
 35        usb_div_pre          16
 36        usb_div_post         17
 37        fir_div_pre          18
 38        fir_div_post         19
 39        sdhc1_gate           20
 40        sdhc2_gate           21
 41        gpt_gate             22
 42        epit1_gate           23
 43        epit2_gate           24
 44        iim_gate             25
 45        ata_gate             26
 46        sdma_gate            27
 47        cspi3_gate           28
 48        rng_gate             29
 49        uart1_gate           30
 50        uart2_gate           31
 51        ssi1_gate            32
 52        i2c1_gate            33
 53        i2c2_gate            34
 54        i2c3_gate            35
 55        hantro_gate          36
 56        mstick1_gate         37
 57        mstick2_gate         38
 58        csi_gate             39
 59        rtc_gate             40
 60        wdog_gate            41
 61        pwm_gate             42
 62        sim_gate             43
 63        ect_gate             44
 64        usb_gate             45
 65        kpp_gate             46
 66        ipu_gate             47
 67        uart3_gate           48
 68        uart4_gate           49
 69        uart5_gate           50
 70        owire_gate           51
 71        ssi2_gate            52
 72        cspi1_gate           53
 73        cspi2_gate           54
 74        gacc_gate            55
 75        emi_gate             56
 76        rtic_gate            57
 77        firi_gate            58
 78
 79properties:
 80  compatible:
 81    const: fsl,imx31-ccm
 82
 83  reg:
 84    maxItems: 1
 85
 86  interrupts:
 87    description: CCM provides 2 interrupt requests, request 1 is to generate
 88      interrupt for DVFS when a frequency change is requested, request 2 is
 89      to generate interrupt for DPTC when a voltage change is requested.
 90    items:
 91      - description: CCM DVFS interrupt request 1
 92      - description: CCM DPTC interrupt request 2
 93
 94  '#clock-cells':
 95    const: 1
 96
 97required:
 98  - compatible
 99  - reg
100  - interrupts
101  - '#clock-cells'
102
103additionalProperties: false
104
105examples:
106  - |
107    clock-controller@53f80000 {
108        compatible = "fsl,imx31-ccm";
109        reg = <0x53f80000 0x4000>;
110        interrupts = <31>, <53>;
111        #clock-cells = <1>;
112    };