allwinner,sun4i-a10-gates-clk.yaml

  1# SPDX-License-Identifier: GPL-2.0
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Allwinner A10 Bus Gates Clock
  8
  9maintainers:
 10  - Chen-Yu Tsai <wens@csie.org>
 11  - Maxime Ripard <mripard@kernel.org>
 12
 13deprecated: true
 14
 15properties:
 16  "#clock-cells":
 17    const: 1
 18    description: >
 19      This additional argument passed to that clock is the offset of
 20      the bit controlling this particular gate in the register.
 21
 22  compatible:
 23    oneOf:
 24      - const: allwinner,sun4i-a10-gates-clk
 25      - const: allwinner,sun4i-a10-axi-gates-clk
 26      - const: allwinner,sun4i-a10-ahb-gates-clk
 27      - const: allwinner,sun5i-a10s-ahb-gates-clk
 28      - const: allwinner,sun5i-a13-ahb-gates-clk
 29      - const: allwinner,sun7i-a20-ahb-gates-clk
 30      - const: allwinner,sun6i-a31-ahb1-gates-clk
 31      - const: allwinner,sun8i-a23-ahb1-gates-clk
 32      - const: allwinner,sun9i-a80-ahb0-gates-clk
 33      - const: allwinner,sun9i-a80-ahb1-gates-clk
 34      - const: allwinner,sun9i-a80-ahb2-gates-clk
 35      - const: allwinner,sun4i-a10-apb0-gates-clk
 36      - const: allwinner,sun5i-a10s-apb0-gates-clk
 37      - const: allwinner,sun5i-a13-apb0-gates-clk
 38      - const: allwinner,sun7i-a20-apb0-gates-clk
 39      - const: allwinner,sun9i-a80-apb0-gates-clk
 40      - const: allwinner,sun8i-a83t-apb0-gates-clk
 41      - const: allwinner,sun4i-a10-apb1-gates-clk
 42      - const: allwinner,sun5i-a13-apb1-gates-clk
 43      - const: allwinner,sun5i-a10s-apb1-gates-clk
 44      - const: allwinner,sun6i-a31-apb1-gates-clk
 45      - const: allwinner,sun7i-a20-apb1-gates-clk
 46      - const: allwinner,sun8i-a23-apb1-gates-clk
 47      - const: allwinner,sun9i-a80-apb1-gates-clk
 48      - const: allwinner,sun6i-a31-apb2-gates-clk
 49      - const: allwinner,sun8i-a23-apb2-gates-clk
 50      - const: allwinner,sun8i-a83t-bus-gates-clk
 51      - const: allwinner,sun9i-a80-apbs-gates-clk
 52      - const: allwinner,sun4i-a10-dram-gates-clk
 53
 54      - items:
 55          - const: allwinner,sun5i-a13-dram-gates-clk
 56          - const: allwinner,sun4i-a10-gates-clk
 57
 58      - items:
 59          - const: allwinner,sun8i-h3-apb0-gates-clk
 60          - const: allwinner,sun4i-a10-gates-clk
 61
 62  reg:
 63    maxItems: 1
 64
 65  clocks:
 66    maxItems: 1
 67
 68  clock-indices:
 69    minItems: 1
 70    maxItems: 64
 71
 72  clock-output-names:
 73    minItems: 1
 74    maxItems: 64
 75
 76required:
 77  - "#clock-cells"
 78  - compatible
 79  - reg
 80  - clocks
 81  - clock-indices
 82  - clock-output-names
 83
 84additionalProperties: false
 85
 86examples:
 87  - |
 88    clk@1c2005c {
 89        #clock-cells = <1>;
 90        compatible = "allwinner,sun4i-a10-axi-gates-clk";
 91        reg = <0x01c2005c 0x4>;
 92        clocks = <&axi>;
 93        clock-indices = <0>;
 94        clock-output-names = "axi_dram";
 95    };
 96
 97  - |
 98    clk@1c20060 {
 99        #clock-cells = <1>;
100        compatible = "allwinner,sun4i-a10-ahb-gates-clk";
101        reg = <0x01c20060 0x8>;
102        clocks = <&ahb>;
103        clock-indices = <0>, <1>,
104                        <2>, <3>,
105                        <4>, <5>, <6>,
106                        <7>, <8>, <9>,
107                        <10>, <11>, <12>,
108                        <13>, <14>, <16>,
109                        <17>, <18>, <20>,
110                        <21>, <22>, <23>,
111                        <24>, <25>, <26>,
112                        <32>, <33>, <34>,
113                        <35>, <36>, <37>,
114                        <40>, <41>, <43>,
115                        <44>, <45>,
116                        <46>, <47>,
117                        <50>, <52>;
118        clock-output-names = "ahb_usb0", "ahb_ehci0",
119                             "ahb_ohci0", "ahb_ehci1",
120                             "ahb_ohci1", "ahb_ss", "ahb_dma",
121                             "ahb_bist", "ahb_mmc0", "ahb_mmc1",
122                             "ahb_mmc2", "ahb_mmc3", "ahb_ms",
123                             "ahb_nand", "ahb_sdram", "ahb_ace",
124                             "ahb_emac", "ahb_ts", "ahb_spi0",
125                             "ahb_spi1", "ahb_spi2", "ahb_spi3",
126                             "ahb_pata", "ahb_sata", "ahb_gps",
127                             "ahb_ve", "ahb_tvd", "ahb_tve0",
128                             "ahb_tve1", "ahb_lcd0", "ahb_lcd1",
129                             "ahb_csi0", "ahb_csi1", "ahb_hdmi",
130                             "ahb_de_be0", "ahb_de_be1",
131                             "ahb_de_fe0", "ahb_de_fe1",
132                             "ahb_mp", "ahb_mali400";
133    };
134
135  - |
136    clk@1c20068 {
137        #clock-cells = <1>;
138        compatible = "allwinner,sun4i-a10-apb0-gates-clk";
139        reg = <0x01c20068 0x4>;
140        clocks = <&apb0>;
141        clock-indices = <0>, <1>,
142                        <2>, <3>,
143                        <5>, <6>,
144                        <7>, <10>;
145        clock-output-names = "apb0_codec", "apb0_spdif",
146                             "apb0_ac97", "apb0_iis",
147                             "apb0_pio", "apb0_ir0",
148                             "apb0_ir1", "apb0_keypad";
149    };
150
151...