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qcom,llcc.yaml
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linux-6.19.14/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
1# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Last Level Cache Controller 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 12description: | 13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, 14 that can be shared by multiple clients. Clients here are different cores in the 15 SoC, the idea is to minimize the local caches at the clients and migrate to 16 common pool of memory. Cache memory is divided into partitions called slices 17 which are assigned to clients. Clients can query the slice details, activate 18 and deactivate them. 19 20properties: 21 compatible: 22 enum: 23 - qcom,ipq5424-llcc 24 - qcom,kaanapali-llcc 25 - qcom,qcs615-llcc 26 - qcom,qcs8300-llcc 27 - qcom,qdu1000-llcc 28 - qcom,sa8775p-llcc 29 - qcom,sar1130p-llcc 30 - qcom,sar2130p-llcc 31 - qcom,sc7180-llcc 32 - qcom,sc7280-llcc 33 - qcom,sc8180x-llcc 34 - qcom,sc8280xp-llcc 35 - qcom,sdm845-llcc 36 - qcom,sm6350-llcc 37 - qcom,sm7150-llcc 38 - qcom,sm8150-llcc 39 - qcom,sm8250-llcc 40 - qcom,sm8350-llcc 41 - qcom,sm8450-llcc 42 - qcom,sm8550-llcc 43 - qcom,sm8650-llcc 44 - qcom,sm8750-llcc 45 - qcom,x1e80100-llcc 46 47 reg: 48 minItems: 1 49 maxItems: 10 50 51 reg-names: 52 minItems: 1 53 maxItems: 10 54 55 interrupts: 56 maxItems: 1 57 58 nvmem-cells: 59 items: 60 - description: Reference to an nvmem node for multi channel DDR 61 62 nvmem-cell-names: 63 items: 64 - const: multi-chan-ddr 65 66required: 67 - compatible 68 - reg 69 - reg-names 70 71allOf: 72 - if: 73 properties: 74 compatible: 75 contains: 76 enum: 77 - qcom,ipq5424-llcc 78 then: 79 properties: 80 reg: 81 items: 82 - description: LLCC0 base register region 83 reg-names: 84 items: 85 - const: llcc0_base 86 87 - if: 88 properties: 89 compatible: 90 contains: 91 enum: 92 - qcom,sar1130p-llcc 93 - qcom,sar2130p-llcc 94 then: 95 properties: 96 reg: 97 items: 98 - description: LLCC0 base register region 99 - description: LLCC1 base register region 100 - description: LLCC broadcast OR register region 101 - description: LLCC broadcast AND register region 102 - description: LLCC scratchpad broadcast OR register region 103 - description: LLCC scratchpad broadcast AND register region 104 reg-names: 105 items: 106 - const: llcc0_base 107 - const: llcc1_base 108 - const: llcc_broadcast_base 109 - const: llcc_broadcast_and_base 110 - const: llcc_scratchpad_broadcast_base 111 - const: llcc_scratchpad_broadcast_and_base 112 113 - if: 114 properties: 115 compatible: 116 contains: 117 enum: 118 - qcom,qcs615-llcc 119 - qcom,sc7180-llcc 120 - qcom,sm6350-llcc 121 then: 122 properties: 123 reg: 124 items: 125 - description: LLCC0 base register region 126 - description: LLCC broadcast base register region 127 reg-names: 128 items: 129 - const: llcc0_base 130 - const: llcc_broadcast_base 131 132 - if: 133 properties: 134 compatible: 135 contains: 136 enum: 137 - qcom,sa8775p-llcc 138 then: 139 properties: 140 reg: 141 items: 142 - description: LLCC0 base register region 143 - description: LLCC1 base register region 144 - description: LLCC2 base register region 145 - description: LLCC3 base register region 146 - description: LLCC4 base register region 147 - description: LLCC5 base register region 148 - description: LLCC broadcast base register region 149 reg-names: 150 items: 151 - const: llcc0_base 152 - const: llcc1_base 153 - const: llcc2_base 154 - const: llcc3_base 155 - const: llcc4_base 156 - const: llcc5_base 157 - const: llcc_broadcast_base 158 159 - if: 160 properties: 161 compatible: 162 contains: 163 enum: 164 - qcom,sc7280-llcc 165 then: 166 properties: 167 reg: 168 items: 169 - description: LLCC0 base register region 170 - description: LLCC1 base register region 171 - description: LLCC broadcast base register region 172 reg-names: 173 items: 174 - const: llcc0_base 175 - const: llcc1_base 176 - const: llcc_broadcast_base 177 178 - if: 179 properties: 180 compatible: 181 contains: 182 enum: 183 - qcom,qdu1000-llcc 184 - qcom,sc8180x-llcc 185 - qcom,sc8280xp-llcc 186 then: 187 properties: 188 reg: 189 items: 190 - description: LLCC0 base register region 191 - description: LLCC1 base register region 192 - description: LLCC2 base register region 193 - description: LLCC3 base register region 194 - description: LLCC4 base register region 195 - description: LLCC5 base register region 196 - description: LLCC6 base register region 197 - description: LLCC7 base register region 198 - description: LLCC broadcast base register region 199 reg-names: 200 items: 201 - const: llcc0_base 202 - const: llcc1_base 203 - const: llcc2_base 204 - const: llcc3_base 205 - const: llcc4_base 206 - const: llcc5_base 207 - const: llcc6_base 208 - const: llcc7_base 209 - const: llcc_broadcast_base 210 211 - if: 212 properties: 213 compatible: 214 contains: 215 enum: 216 - qcom,x1e80100-llcc 217 then: 218 properties: 219 reg: 220 items: 221 - description: LLCC0 base register region 222 - description: LLCC1 base register region 223 - description: LLCC2 base register region 224 - description: LLCC3 base register region 225 - description: LLCC4 base register region 226 - description: LLCC5 base register region 227 - description: LLCC6 base register region 228 - description: LLCC7 base register region 229 - description: LLCC broadcast base register region 230 - description: LLCC broadcast AND register region 231 reg-names: 232 items: 233 - const: llcc0_base 234 - const: llcc1_base 235 - const: llcc2_base 236 - const: llcc3_base 237 - const: llcc4_base 238 - const: llcc5_base 239 - const: llcc6_base 240 - const: llcc7_base 241 - const: llcc_broadcast_base 242 - const: llcc_broadcast_and_base 243 244 - if: 245 properties: 246 compatible: 247 contains: 248 enum: 249 - qcom,qcs8300-llcc 250 - qcom,sdm845-llcc 251 - qcom,sm8150-llcc 252 - qcom,sm8250-llcc 253 - qcom,sm8350-llcc 254 then: 255 properties: 256 reg: 257 items: 258 - description: LLCC0 base register region 259 - description: LLCC1 base register region 260 - description: LLCC2 base register region 261 - description: LLCC3 base register region 262 - description: LLCC broadcast base register region 263 reg-names: 264 items: 265 - const: llcc0_base 266 - const: llcc1_base 267 - const: llcc2_base 268 - const: llcc3_base 269 - const: llcc_broadcast_base 270 271 - if: 272 properties: 273 compatible: 274 contains: 275 enum: 276 - qcom,kaanapali-llcc 277 - qcom,sm8450-llcc 278 - qcom,sm8550-llcc 279 - qcom,sm8650-llcc 280 - qcom,sm8750-llcc 281 then: 282 properties: 283 reg: 284 items: 285 - description: LLCC0 base register region 286 - description: LLCC1 base register region 287 - description: LLCC2 base register region 288 - description: LLCC3 base register region 289 - description: LLCC broadcast OR register region 290 - description: LLCC broadcast AND register region 291 reg-names: 292 items: 293 - const: llcc0_base 294 - const: llcc1_base 295 - const: llcc2_base 296 - const: llcc3_base 297 - const: llcc_broadcast_base 298 - const: llcc_broadcast_and_base 299 300additionalProperties: false 301 302examples: 303 - | 304 #include <dt-bindings/interrupt-controller/arm-gic.h> 305 306 soc { 307 #address-cells = <2>; 308 #size-cells = <2>; 309 310 system-cache-controller@1100000 { 311 compatible = "qcom,sdm845-llcc"; 312 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>, 313 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, 314 <0 0x01300000 0 0x50000>; 315 reg-names = "llcc0_base", "llcc1_base", "llcc2_base", 316 "llcc3_base", "llcc_broadcast_base"; 317 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; 318 }; 319 };
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