fsl,fpga-qixis.yaml

 1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 2%YAML 1.2
 3---
 4$id: http://devicetree.org/schemas/board/fsl,fpga-qixis.yaml#
 5$schema: http://devicetree.org/meta-schemas/core.yaml#
 6
 7title: Freescale on-board FPGA/CPLD
 8
 9maintainers:
10  - Frank Li <Frank.Li@nxp.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - const: fsl,p1022ds-fpga
17          - const: fsl,fpga-ngpixis
18      - items:
19          - enum:
20              - fsl,ls1088aqds-fpga
21              - fsl,ls1088ardb-fpga
22              - fsl,ls2080aqds-fpga
23              - fsl,ls2080ardb-fpga
24          - const: fsl,fpga-qixis
25      - items:
26          - enum:
27              - fsl,ls1043aqds-fpga
28              - fsl,ls1043ardb-fpga
29              - fsl,ls1046aqds-fpga
30              - fsl,ls1046ardb-fpga
31              - fsl,ls208xaqds-fpga
32          - const: fsl,fpga-qixis
33          - const: simple-mfd
34      - enum:
35          - fsl,ls1043ardb-cpld
36          - fsl,ls1046ardb-cpld
37          - fsl,t1040rdb-cpld
38          - fsl,t1042rdb-cpld
39          - fsl,t1042rdb_pi-cpld
40
41  interrupts:
42    maxItems: 1
43
44  reg:
45    maxItems: 1
46
47  "#address-cells":
48    const: 1
49
50  "#size-cells":
51    const: 1
52
53  ranges:
54    maxItems: 1
55
56patternProperties:
57  '^mdio-mux@[a-f0-9,]+$':
58    $ref: /schemas/net/mdio-mux-mmioreg.yaml
59
60  '^gpio@[0-9a-f]+$':
61    type: object
62    additionalProperties: true
63
64    properties:
65      compatible:
66        contains:
67          enum:
68            - fsl,ls1046aqds-fpga-gpio-stat-pres2
69
70required:
71  - compatible
72  - reg
73
74additionalProperties: false
75
76examples:
77  - |
78    #include <dt-bindings/interrupt-controller/irq.h>
79    board-control@3 {
80        compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
81        reg = <3 0x30>;
82        interrupt-parent = <&mpic>;
83        interrupts = <8 IRQ_TYPE_LEVEL_LOW 0 0>;
84    };
85
86  - |
87    board-control@3 {
88        compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
89        reg = <0x3 0x10000>;
90    };
91