rockchip,dwc-ahci.yaml

  1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: Synopsys DWC AHCI SATA controller for Rockchip devices
  8
  9maintainers:
 10  - Serge Semin <fancer.lancer@gmail.com>
 11
 12description:
 13  This document defines device tree bindings for the Synopsys DWC
 14  implementation of the AHCI SATA controller found in Rockchip
 15  devices.
 16
 17select:
 18  properties:
 19    compatible:
 20      contains:
 21        enum:
 22          - rockchip,rk3568-dwc-ahci
 23          - rockchip,rk3576-dwc-ahci
 24          - rockchip,rk3588-dwc-ahci
 25  required:
 26    - compatible
 27
 28properties:
 29  compatible:
 30    items:
 31      - enum:
 32          - rockchip,rk3568-dwc-ahci
 33          - rockchip,rk3576-dwc-ahci
 34          - rockchip,rk3588-dwc-ahci
 35      - const: snps,dwc-ahci
 36
 37  ports-implemented:
 38    const: 1
 39
 40  power-domains:
 41    maxItems: 1
 42
 43  sata-port@0:
 44    $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
 45
 46    properties:
 47      reg:
 48        const: 0
 49
 50    unevaluatedProperties: false
 51
 52patternProperties:
 53  "^sata-port@[1-9a-e]$": false
 54
 55required:
 56  - compatible
 57  - reg
 58  - interrupts
 59  - clocks
 60  - clock-names
 61  - ports-implemented
 62
 63allOf:
 64  - $ref: snps,dwc-ahci-common.yaml#
 65  - if:
 66      properties:
 67        compatible:
 68          contains:
 69            enum:
 70              - rockchip,rk3588-dwc-ahci
 71    then:
 72      properties:
 73        clocks:
 74          maxItems: 5
 75        clock-names:
 76          items:
 77            - const: sata
 78            - const: pmalive
 79            - const: rxoob
 80            - const: ref
 81            - const: asic
 82  - if:
 83      properties:
 84        compatible:
 85          contains:
 86            enum:
 87              - rockchip,rk3568-dwc-ahci
 88              - rockchip,rk3576-dwc-ahci
 89    then:
 90      properties:
 91        clocks:
 92          maxItems: 3
 93        clock-names:
 94          items:
 95            - const: sata
 96            - const: pmalive
 97            - const: rxoob
 98
 99unevaluatedProperties: false
100
101examples:
102  - |
103    #include <dt-bindings/clock/rockchip,rk3588-cru.h>
104    #include <dt-bindings/interrupt-controller/arm-gic.h>
105    #include <dt-bindings/ata/ahci.h>
106    #include <dt-bindings/phy/phy.h>
107
108    sata@fe210000 {
109      compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
110      reg = <0xfe210000 0x1000>;
111      clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>,
112               <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>,
113               <&cru CLK_PIPEPHY0_PIPE_ASIC_G>;
114      clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
115      interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>;
116      ports-implemented = <0x1>;
117      #address-cells = <1>;
118      #size-cells = <0>;
119
120      sata-port@0 {
121        reg = <0>;
122        hba-port-cap = <HBA_PORT_FBSCP>;
123        phys = <&combphy0_ps PHY_TYPE_SATA>;
124        phy-names = "sata-phy";
125        snps,rx-ts-max = <32>;
126        snps,tx-ts-max = <32>;
127      };
128    };
129
130...