qcom,coresight-tpdm.yaml

  1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3%YAML 1.2
  4---
  5$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
  6$schema: http://devicetree.org/meta-schemas/core.yaml#
  7
  8title: Trace, Profiling and Diagnostics Monitor - TPDM
  9
 10description: |
 11  The TPDM or Monitor serves as data collection component for various dataset
 12  types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
 13  Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
 14  Single Bit (DSB). It performs data collection in the data producing clock
 15  domain and transfers it to the data collection time domain, generally ATB
 16  clock domain.
 17
 18  The primary use case of the TPDM is to collect data from different data
 19  sources and send it to a TPDA for packetization, timestamping, and funneling.
 20
 21maintainers:
 22  - Mao Jinlong <quic_jinlmao@quicinc.com>
 23  - Tao Zhang <quic_taozha@quicinc.com>
 24
 25# Need a custom select here or 'arm,primecell' will match on lots of nodes
 26select:
 27  properties:
 28    compatible:
 29      contains:
 30        enum:
 31          - qcom,coresight-tpdm
 32  required:
 33    - compatible
 34
 35properties:
 36  $nodename:
 37    pattern: "^tpdm(@[0-9a-f]+)$"
 38  compatible:
 39    oneOf:
 40      - items:
 41          - const: qcom,coresight-static-tpdm
 42      - items:
 43          - const: qcom,coresight-tpdm
 44          - const: arm,primecell
 45
 46  reg:
 47    maxItems: 1
 48
 49  qcom,dsb-element-bits:
 50    description:
 51      Specifies the DSB(Discrete Single Bit) element size supported by
 52      the monitor. The associated aggregator will read this size before it
 53      is enabled. DSB element size currently only supports 32-bit and 64-bit.
 54    enum: [32, 64]
 55
 56  qcom,cmb-element-bits:
 57    description:
 58      Specifies the CMB(Continuous Multi-Bit) element size supported by
 59      the monitor. The associated aggregator will read this size before it
 60      is enabled. CMB element size currently only supports 8-bit, 32-bit
 61      and 64-bit.
 62    enum: [8, 32, 64]
 63
 64  qcom,dsb-msrs-num:
 65    description:
 66      Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
 67      registers supported by the monitor. If this property is not configured
 68      or set to 0, it means this DSB TPDM doesn't support MSR.
 69    $ref: /schemas/types.yaml#/definitions/uint32
 70    minimum: 0
 71    maximum: 32
 72
 73  qcom,cmb-msrs-num:
 74    description:
 75      Specifies the number of CMB MSR(mux select register) registers supported
 76      by the monitor. If this property is not configured or set to 0, it means
 77      this TPDM doesn't support CMB MSR.
 78    $ref: /schemas/types.yaml#/definitions/uint32
 79    minimum: 0
 80    maximum: 32
 81
 82  label:
 83    description:
 84      Description of a coresight device.
 85
 86  clocks:
 87    maxItems: 1
 88
 89  clock-names:
 90    items:
 91      - const: apb_pclk
 92
 93  out-ports:
 94    description: |
 95      Output connections from the TPDM to coresight funnel/TPDA.
 96    $ref: /schemas/graph.yaml#/properties/ports
 97
 98    properties:
 99      port:
100        description: Output connection from the TPDM to coresight
101            funnel/TPDA.
102        $ref: /schemas/graph.yaml#/properties/port
103
104required:
105  - compatible
106  - reg
107  - clocks
108  - clock-names
109
110additionalProperties: false
111
112examples:
113  # minimum TPDM definition. TPDM connect to coresight TPDA.
114  - |
115    tpdm@684c000 {
116      compatible = "qcom,coresight-tpdm", "arm,primecell";
117      reg = <0x0684c000 0x1000>;
118
119      qcom,dsb-element-bits = <32>;
120      qcom,dsb-msrs-num = <16>;
121
122      clocks = <&aoss_qmp>;
123      clock-names = "apb_pclk";
124
125      out-ports {
126        port {
127          tpdm_prng_out_tpda_qdss: endpoint {
128            remote-endpoint =
129              <&tpda_qdss_in_tpdm_prng>;
130          };
131        };
132      };
133    };
134
135    tpdm@6c29000 {
136      compatible = "qcom,coresight-tpdm", "arm,primecell";
137      reg = <0x06c29000 0x1000>;
138
139      qcom,cmb-element-bits = <64>;
140      qcom,cmb-msrs-num = <32>;
141
142      clocks = <&aoss_qmp>;
143      clock-names = "apb_pclk";
144
145      out-ports {
146        port {
147          tpdm_ipcc_out_funnel_center: endpoint {
148            remote-endpoint = <&funnel_center_in_tpdm_ipcc>;
149          };
150        };
151      };
152    };
153
154    turing-llm-tpdm {
155      compatible = "qcom,coresight-static-tpdm";
156
157      qcom,cmb-element-bits = <32>;
158
159      out-ports {
160        port {
161         turing_llm_tpdm_out: endpoint {
162           remote-endpoint = <&turing0_funnel_in1>;
163         };
164        };
165      };
166    };
167...