mediatek,mt7622-wed.yaml

  1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2%YAML 1.2
  3---
  4$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#
  5$schema: http://devicetree.org/meta-schemas/core.yaml#
  6
  7title: MediaTek Wireless Ethernet Dispatch Controller for MT7622
  8
  9maintainers:
 10  - Lorenzo Bianconi <lorenzo@kernel.org>
 11  - Felix Fietkau <nbd@nbd.name>
 12
 13description:
 14  The mediatek wireless ethernet dispatch controller can be configured to
 15  intercept and handle access to the WLAN DMA queues and PCIe interrupts
 16  and implement hardware flow offloading from ethernet to WLAN.
 17
 18properties:
 19  compatible:
 20    items:
 21      - enum:
 22          - mediatek,mt7622-wed
 23          - mediatek,mt7981-wed
 24          - mediatek,mt7986-wed
 25          - mediatek,mt7988-wed
 26      - const: syscon
 27
 28  reg:
 29    maxItems: 1
 30
 31  interrupts:
 32    maxItems: 1
 33
 34  memory-region:
 35    items:
 36      - description: firmware EMI region
 37      - description: firmware ILM region
 38      - description: firmware DLM region
 39      - description: firmware CPU DATA region
 40      - description: firmware BOOT region
 41
 42  memory-region-names:
 43    items:
 44      - const: wo-emi
 45      - const: wo-ilm
 46      - const: wo-dlm
 47      - const: wo-data
 48      - const: wo-boot
 49
 50  mediatek,wo-ccif:
 51    $ref: /schemas/types.yaml#/definitions/phandle
 52    description: mediatek wed-wo controller interface.
 53
 54allOf:
 55  - if:
 56      properties:
 57        compatible:
 58          contains:
 59            const: mediatek,mt7622-wed
 60    then:
 61      properties:
 62        memory-region-names: false
 63        memory-region: false
 64        mediatek,wo-ccif: false
 65
 66required:
 67  - compatible
 68  - reg
 69  - interrupts
 70
 71additionalProperties: false
 72
 73examples:
 74  - |
 75    #include <dt-bindings/interrupt-controller/arm-gic.h>
 76    #include <dt-bindings/interrupt-controller/irq.h>
 77    soc {
 78      #address-cells = <2>;
 79      #size-cells = <2>;
 80      wed0: wed@1020a000 {
 81        compatible = "mediatek,mt7622-wed","syscon";
 82        reg = <0 0x1020a000 0 0x1000>;
 83        interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>;
 84      };
 85    };
 86
 87  - |
 88    #include <dt-bindings/interrupt-controller/arm-gic.h>
 89    #include <dt-bindings/interrupt-controller/irq.h>
 90    soc {
 91      #address-cells = <2>;
 92      #size-cells = <2>;
 93
 94      wed@15010000 {
 95        compatible = "mediatek,mt7986-wed", "syscon";
 96        reg = <0 0x15010000 0 0x1000>;
 97        interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 98
 99        memory-region = <&wo_emi>, <&wo_ilm>, <&wo_dlm>,
100                        <&wo_data>, <&wo_boot>;
101        memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
102                              "wo-data", "wo-boot";
103        mediatek,wo-ccif = <&wo_ccif0>;
104      };
105    };